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Searched refs:mmCP_HQD_IB_BASE_ADDR_HI (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h586 #define mmCP_HQD_IB_BASE_ADDR_HI 0x3258 macro
H A Dgfx_7_2_d.h599 #define mmCP_HQD_IB_BASE_ADDR_HI 0x3258 macro
H A Dgfx_8_1_d.h649 #define mmCP_HQD_IB_BASE_ADDR_HI 0x3258 macro
H A Dgfx_8_0_d.h649 #define mmCP_HQD_IB_BASE_ADDR_HI 0x3258 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2855 #define mmCP_HQD_IB_BASE_ADDR_HI … macro
H A Dgc_9_1_offset.h3083 #define mmCP_HQD_IB_BASE_ADDR_HI … macro
H A Dgc_9_2_1_offset.h3039 #define mmCP_HQD_IB_BASE_ADDR_HI … macro
H A Dgc_10_1_0_offset.h5339 #define mmCP_HQD_IB_BASE_ADDR_HI … macro
H A Dgc_10_3_0_offset.h4972 #define mmCP_HQD_IB_BASE_ADDR_HI … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c2915 mqd->cp_hqd_ib_base_addr_hi = RREG32(mmCP_HQD_IB_BASE_ADDR_HI); in gfx_v7_0_mqd_init()
H A Dgfx_v9_0.c257 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_BASE_ADDR_HI),
H A Dgfx_v10_0.c399 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_IB_BASE_ADDR_HI),