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Searched refs:mmCP_HQD_EOP_WPTR (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v8.c196 WREG32(mmCP_HQD_EOP_WPTR, m->cp_hqd_eop_wptr); in kgd_hqd_load()
H A Dgfx_v8_0.c4529 mqd->cp_hqd_eop_wptr = RREG32(mmCP_HQD_EOP_WPTR); in gfx_v8_0_mqd_init()
4577 WREG32(mmCP_HQD_EOP_WPTR, mqd->cp_hqd_eop_wptr); in gfx_v8_0_mqd_commit()
H A Dgfx_v9_0.c265 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_WPTR),
H A Dgfx_v10_0.c407 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_WPTR),
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h674 #define mmCP_HQD_EOP_WPTR 0x326e macro
H A Dgfx_8_0_d.h674 #define mmCP_HQD_EOP_WPTR 0x326e macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2905 #define mmCP_HQD_EOP_WPTR … macro
H A Dgc_9_1_offset.h3133 #define mmCP_HQD_EOP_WPTR … macro
H A Dgc_9_2_1_offset.h3089 #define mmCP_HQD_EOP_WPTR … macro
H A Dgc_10_1_0_offset.h5389 #define mmCP_HQD_EOP_WPTR … macro
H A Dgc_10_3_0_offset.h5022 #define mmCP_HQD_EOP_WPTR … macro