Searched refs:mmCP_HQD_EOP_BASE_ADDR (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_8_1_d.h | 670 #define mmCP_HQD_EOP_BASE_ADDR 0x326a macro
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| H A D | gfx_8_0_d.h | 670 #define mmCP_HQD_EOP_BASE_ADDR 0x326a macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_0.c | 261 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_BASE_ADDR),
3613 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR, in gfx_v9_0_kiq_init_register()
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| H A D | gfx_v10_0.c | 403 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_EOP_BASE_ADDR),
6920 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR, in gfx_v10_0_kiq_init_register()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2897 #define mmCP_HQD_EOP_BASE_ADDR … macro
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| H A D | gc_9_1_offset.h | 3125 #define mmCP_HQD_EOP_BASE_ADDR … macro
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| H A D | gc_9_2_1_offset.h | 3081 #define mmCP_HQD_EOP_BASE_ADDR … macro
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| H A D | gc_10_1_0_offset.h | 5381 #define mmCP_HQD_EOP_BASE_ADDR … macro
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| H A D | gc_10_3_0_offset.h | 5014 #define mmCP_HQD_EOP_BASE_ADDR … macro
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