| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v7.c | 426 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST); in kgd_hqd_destroy()
441 WREG32(mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_hqd_destroy()
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| H A D | amdgpu_amdkfd_gfx_v8.c | 461 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST); in kgd_hqd_destroy()
476 WREG32(mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_hqd_destroy()
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| H A D | amdgpu_amdkfd_gfx_v10.c | 591 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST); in kgd_hqd_destroy()
607 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_hqd_destroy()
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| H A D | amdgpu_amdkfd_gfx_v10_3.c | 530 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type); in hqd_destroy_v10_3()
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| H A D | amdgpu_amdkfd_gfx_v9.c | 557 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_gfx_v9_hqd_destroy()
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| H A D | gfx_v9_0.c | 260 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_REQUEST),
1030 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 0x2); in gfx_v9_0_kiq_reset_hw_queue()
3673 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v9_0_kiq_init_register()
3679 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, in gfx_v9_0_kiq_init_register()
3771 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v9_0_kiq_fini_register()
3786 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, in gfx_v9_0_kiq_fini_register()
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| H A D | gfx_v7_0.c | 2802 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v7_0_mqd_deactivate()
2812 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0); in gfx_v7_0_mqd_deactivate()
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| H A D | gfx_v10_0.c | 403 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_REQUEST),
6942 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v10_0_kiq_init_register()
6948 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, in gfx_v10_0_kiq_init_register()
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| H A D | gfx_v8_0.c | 4401 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0); in gfx_v8_0_deactivate_hqd()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 591 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| H A D | gfx_7_2_d.h | 604 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| H A D | gfx_8_1_d.h | 654 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| H A D | gfx_8_0_d.h | 654 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2865 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| H A D | gc_9_1_offset.h | 3093 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| H A D | gc_9_2_1_offset.h | 3049 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| H A D | gc_10_1_0_offset.h | 5349 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| H A D | gc_10_3_0_offset.h | 4982 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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