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Searched refs:mmCP_HQD_CTX_SAVE_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h678 #define mmCP_HQD_CTX_SAVE_CONTROL 0x3272 macro
H A Dgfx_8_0_d.h678 #define mmCP_HQD_CTX_SAVE_CONTROL 0x3272 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2913 #define mmCP_HQD_CTX_SAVE_CONTROL … macro
H A Dgc_9_1_offset.h3141 #define mmCP_HQD_CTX_SAVE_CONTROL … macro
H A Dgc_9_2_1_offset.h3097 #define mmCP_HQD_CTX_SAVE_CONTROL … macro
H A Dgc_10_1_0_offset.h5397 #define mmCP_HQD_CTX_SAVE_CONTROL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c4528 tmp = RREG32(mmCP_HQD_CTX_SAVE_CONTROL); in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c288 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_CONTROL),
H A Dgfx_v10_0.c406 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CTX_SAVE_CONTROL),