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Searched refs:mmCP_HQD_CNTL_STACK_SIZE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h680 #define mmCP_HQD_CNTL_STACK_SIZE 0x3274 macro
H A Dgfx_8_0_d.h680 #define mmCP_HQD_CNTL_STACK_SIZE 0x3274 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2917 #define mmCP_HQD_CNTL_STACK_SIZE macro
H A Dgc_9_1_offset.h3145 #define mmCP_HQD_CNTL_STACK_SIZE macro
H A Dgc_9_2_1_offset.h3101 #define mmCP_HQD_CNTL_STACK_SIZE macro
H A Dgc_10_1_0_offset.h5401 #define mmCP_HQD_CNTL_STACK_SIZE macro
H A Dgc_10_3_0_offset.h5034 #define mmCP_HQD_CNTL_STACK_SIZE macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c4547 mqd->cp_hqd_cntl_stack_size = RREG32(mmCP_HQD_CNTL_STACK_SIZE); in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c271 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CNTL_STACK_SIZE),
H A Dgfx_v10_0.c414 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_CNTL_STACK_SIZE),