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Searched refs:mmCP_GFX_MQD_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2657 #define mmCP_GFX_MQD_CONTROL … macro
H A Dgc_9_1_offset.h2909 #define mmCP_GFX_MQD_CONTROL … macro
H A Dgc_9_2_1_offset.h2843 #define mmCP_GFX_MQD_CONTROL … macro
H A Dgc_10_1_0_offset.h5057 #define mmCP_GFX_MQD_CONTROL … macro
H A Dgc_10_3_0_offset.h4714 #define mmCP_GFX_MQD_CONTROL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c6652 tmp = RREG32_SOC15(GC, 0, mmCP_GFX_MQD_CONTROL); in gfx_v10_0_gfx_mqd_init()