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Searched refs:mmCP_CPC_STATUS (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnv.c353 { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},
H A Dsoc15.c376 { SOC15_REG_ENTRY(GC, 0, mmCP_CPC_STATUS)},
H A Dcik.c1063 {mmCP_CPC_STATUS},
H A Dvi.c687 {mmCP_CPC_STATUS},
H A Dgfx_v9_0.c217 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STATUS),
H A Dgfx_v10_0.c350 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CPC_STATUS),
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h311 #define mmCP_CPC_STATUS 0x2084 macro
H A Dgfx_7_2_d.h314 #define mmCP_CPC_STATUS 0x2084 macro
H A Dgfx_8_1_d.h350 #define mmCP_CPC_STATUS 0x2084 macro
H A Dgfx_8_0_d.h350 #define mmCP_CPC_STATUS 0x2084 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h121 #define mmCP_CPC_STATUS macro
H A Dgc_9_1_offset.h121 #define mmCP_CPC_STATUS macro
H A Dgc_9_2_1_offset.h123 #define mmCP_CPC_STATUS macro
H A Dgc_10_1_0_offset.h2127 #define mmCP_CPC_STATUS macro
H A Dgc_10_3_0_offset.h2204 #define mmCP_CPC_STATUS macro