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Searched refs:mmCP_CPC_IC_BASE_HI (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h59 { 0x000000b4, mmCP_CPC_IC_BASE_HI },
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu8_smumgr.c212 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); in smu8_load_mec_firmware()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h347 #define mmCP_CPC_IC_BASE_HI 0x30ba macro
H A Dgfx_8_0_d.h347 #define mmCP_CPC_IC_BASE_HI 0x30ba macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2605 #define mmCP_CPC_IC_BASE_HI … macro
H A Dgc_9_1_offset.h2875 #define mmCP_CPC_IC_BASE_HI … macro
H A Dgc_9_2_1_offset.h2809 #define mmCP_CPC_IC_BASE_HI … macro
H A Dgc_10_1_0_offset.h10291 #define mmCP_CPC_IC_BASE_HI … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c3506 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, in gfx_v9_0_cp_compute_load_microcode()