Searched refs:mmCP_CPC_IC_BASE_HI (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | polaris10_pwrvirus.h | 59 { 0x000000b4, mmCP_CPC_IC_BASE_HI },
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| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | smu8_smumgr.c | 212 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); in smu8_load_mec_firmware()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_8_1_d.h | 347 #define mmCP_CPC_IC_BASE_HI 0x30ba macro
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| H A D | gfx_8_0_d.h | 347 #define mmCP_CPC_IC_BASE_HI 0x30ba macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2605 #define mmCP_CPC_IC_BASE_HI … macro
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| H A D | gc_9_1_offset.h | 2875 #define mmCP_CPC_IC_BASE_HI … macro
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| H A D | gc_9_2_1_offset.h | 2809 #define mmCP_CPC_IC_BASE_HI … macro
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| H A D | gc_10_1_0_offset.h | 10291 #define mmCP_CPC_IC_BASE_HI … macro
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| H A D | gc_10_3_0_offset.h | 10001 #define mmCP_CPC_IC_BASE_HI … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 5869 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, in gfx_v10_0_cp_gfx_enable()
6541 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, in gfx_v10_0_gfx_mqd_set_priority()
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| H A D | gfx_v9_0.c | 3427 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, in gfx_v9_0_mqd_init()
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