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Searched refs:mmCP_CE_IC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c5818 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_ce_cache()
5820 WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_ce_cache()
5824 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_ce_cache()
6106 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_ce_microcode()
6108 WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); in gfx_v10_0_cp_gfx_load_ce_microcode()
6112 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_ce_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h10287 #define mmCP_CE_IC_OP_CNTL … macro
H A Dgc_10_3_0_offset.h9997 #define mmCP_CE_IC_OP_CNTL … macro