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Searched refs:mmCP_CE_IB1_CMD_BUFSZ (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4811 #define mmCP_CE_IB1_CMD_BUFSZ … macro
H A Dgc_9_1_offset.h5041 #define mmCP_CE_IB1_CMD_BUFSZ … macro
H A Dgc_9_2_1_offset.h4997 #define mmCP_CE_IB1_CMD_BUFSZ … macro
H A Dgc_10_1_0_offset.h7315 #define mmCP_CE_IB1_CMD_BUFSZ … macro
H A Dgc_10_3_0_offset.h6950 #define mmCP_CE_IB1_CMD_BUFSZ … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c177 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_CMD_BUFSZ),
H A Dgfx_v10_0.c308 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_CMD_BUFSZ),