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Searched refs:mmCP_CE_IB1_BUFSZ (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h374 #define mmCP_CE_IB1_BUFSZ 0x21C8 macro
H A Dgfx_7_0_d.h519 #define mmCP_CE_IB1_BUFSZ 0xc0c8 macro
H A Dgfx_7_2_d.h532 #define mmCP_CE_IB1_BUFSZ 0xc0c8 macro
H A Dgfx_8_1_d.h585 #define mmCP_CE_IB1_BUFSZ 0xc0c8 macro
H A Dgfx_8_0_d.h585 #define mmCP_CE_IB1_BUFSZ 0xc0c8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4831 #define mmCP_CE_IB1_BUFSZ … macro
H A Dgc_9_1_offset.h5061 #define mmCP_CE_IB1_BUFSZ … macro
H A Dgc_9_2_1_offset.h5017 #define mmCP_CE_IB1_BUFSZ … macro
H A Dgc_10_1_0_offset.h7335 #define mmCP_CE_IB1_BUFSZ … macro
H A Dgc_10_3_0_offset.h6968 #define mmCP_CE_IB1_BUFSZ … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c183 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BUFSZ),
H A Dgfx_v10_0.c313 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BUFSZ),