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Searched refs:mmCP_CE_IB1_BASE_LO (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h373 #define mmCP_CE_IB1_BASE_LO 0x21C6 macro
H A Dgfx_7_0_d.h517 #define mmCP_CE_IB1_BASE_LO 0xc0c6 macro
H A Dgfx_7_2_d.h530 #define mmCP_CE_IB1_BASE_LO 0xc0c6 macro
H A Dgfx_8_1_d.h583 #define mmCP_CE_IB1_BASE_LO 0xc0c6 macro
H A Dgfx_8_0_d.h583 #define mmCP_CE_IB1_BASE_LO 0xc0c6 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4827 #define mmCP_CE_IB1_BASE_LO … macro
H A Dgc_9_1_offset.h5057 #define mmCP_CE_IB1_BASE_LO … macro
H A Dgc_9_2_1_offset.h5013 #define mmCP_CE_IB1_BASE_LO … macro
H A Dgc_10_1_0_offset.h7331 #define mmCP_CE_IB1_BASE_LO … macro
H A Dgc_10_3_0_offset.h6964 #define mmCP_CE_IB1_BASE_LO … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c181 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_LO),
H A Dgfx_v10_0.c311 SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_IB1_BASE_LO),