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Searched refs:mmCPG_UTCL1_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c679 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_UTCL1_CNTL, 0x08000000, 0x08000080),
715 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_UTCL1_CNTL, 0x08000000, 0x08000080),
756 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPG_UTCL1_CNTL, 0x7f8fffff, 0x08000080),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2354 #define mmCPG_UTCL1_CNTL macro
H A Dgc_9_1_offset.h2631 #define mmCPG_UTCL1_CNTL macro
H A Dgc_9_2_1_offset.h2569 #define mmCPG_UTCL1_CNTL macro
H A Dgc_10_1_0_offset.h4699 #define mmCPG_UTCL1_CNTL macro
H A Dgc_10_3_0_offset.h4354 #define mmCPG_UTCL1_CNTL macro