Home
last modified time | relevance | path

Searched refs:mmCOMPUTE_PGM_RSRC1 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1204 #define mmCOMPUTE_PGM_RSRC1 0x2e12 macro
H A Dgfx_7_2_d.h1217 #define mmCOMPUTE_PGM_RSRC1 0x2e12 macro
H A Dgfx_8_1_d.h1302 #define mmCOMPUTE_PGM_RSRC1 0x2e12 macro
H A Dgfx_8_0_d.h1299 #define mmCOMPUTE_PGM_RSRC1 0x2e12 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c4478 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x3f },
4495 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0xbf },
4512 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x240 }, /* (80 GPRS) */
4529 { SOC15_REG_ENTRY(GC, 0, mmCOMPUTE_PGM_RSRC1), 0x240 }, /* (80 GPRS) */
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2214 #define mmCOMPUTE_PGM_RSRC1 macro
H A Dgc_9_1_offset.h2499 #define mmCOMPUTE_PGM_RSRC1 macro
H A Dgc_9_2_1_offset.h2433 #define mmCOMPUTE_PGM_RSRC1 macro
H A Dgc_10_1_0_offset.h4571 #define mmCOMPUTE_PGM_RSRC1 macro