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Searched refs:mmCNVC_CFG2_PRE_CSC_MODE_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h4693 #define mmCNVC_CFG2_PRE_CSC_MODE_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h5238 #define mmCNVC_CFG2_PRE_CSC_MODE_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h5289 #define mmCNVC_CFG2_PRE_CSC_MODE_BASE_IDX … macro