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Searched refs:mmCGTS_SA0_WGP12_CU1_TCP_CTRL_REG (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h10109 #define mmCGTS_SA0_WGP12_CU1_TCP_CTRL_REG macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c8092 mmCGTS_SA0_WGP12_CU1_TCP_CTRL_REG, in gfx_v10_0_apply_medium_grain_clock_gating_workaround()