Home
last modified time | relevance | path

Searched refs:mmCGTS_CU15_TA_SQC_CTRL_REG_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6468 #define mmCGTS_CU15_TA_SQC_CTRL_REG_BASE_IDX … macro
H A Dgc_9_1_offset.h6690 #define mmCGTS_CU15_TA_SQC_CTRL_REG_BASE_IDX … macro
H A Dgc_9_2_1_offset.h6702 #define mmCGTS_CU15_TA_SQC_CTRL_REG_BASE_IDX … macro