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Searched refs:mmCC_GC_EDC_CONFIG (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h741 #define mmCC_GC_EDC_CONFIG 0x3098 macro
H A Dgfx_7_2_d.h754 #define mmCC_GC_EDC_CONFIG 0x3098 macro
H A Dgfx_8_1_d.h826 #define mmCC_GC_EDC_CONFIG 0x3098 macro
H A Dgfx_8_0_d.h826 #define mmCC_GC_EDC_CONFIG 0x3098 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c1633 tmp = RREG32(mmCC_GC_EDC_CONFIG); in gfx_v8_0_do_edc_gpr_workarounds()
1635 WREG32(mmCC_GC_EDC_CONFIG, tmp); in gfx_v8_0_do_edc_gpr_workarounds()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2537 #define mmCC_GC_EDC_CONFIG macro
H A Dgc_9_1_offset.h2807 #define mmCC_GC_EDC_CONFIG macro
H A Dgc_10_1_0_offset.h4879 #define mmCC_GC_EDC_CONFIG macro
H A Dgc_10_3_0_offset.h4534 #define mmCC_GC_EDC_CONFIG macro