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Searched refs:mmCC_DC_PIPE_DIS (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dce120/
H A Ddce120_resource.c1046 uint32_t value = dm_read_reg_soc15(ctx, mmCC_DC_PIPE_DIS, 0); in read_pipe_fuses()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c1293 uint32_t value = dm_read_reg_soc15(ctx, mmCC_DC_PIPE_DIS, 0); in read_pipe_fuses()
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h481 #define mmCC_DC_PIPE_DIS 0x177F macro
H A Ddce_8_0_d.h1215 #define mmCC_DC_PIPE_DIS 0x177f macro
H A Ddce_10_0_d.h1509 #define mmCC_DC_PIPE_DIS 0x312 macro
H A Ddce_11_0_d.h1326 #define mmCC_DC_PIPE_DIS 0x312 macro
H A Ddce_11_2_d.h1404 #define mmCC_DC_PIPE_DIS 0x312 macro
H A Ddce_12_0_offset.h1020 #define mmCC_DC_PIPE_DIS … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h299 #define mmCC_DC_PIPE_DIS … macro
H A Ddcn_3_0_1_offset.h498 #define mmCC_DC_PIPE_DIS … macro
H A Ddcn_1_0_offset.h926 #define mmCC_DC_PIPE_DIS … macro
H A Ddcn_2_1_0_offset.h554 #define mmCC_DC_PIPE_DIS … macro
H A Ddcn_3_0_2_offset.h466 #define mmCC_DC_PIPE_DIS … macro
H A Ddcn_2_0_0_offset.h592 #define mmCC_DC_PIPE_DIS … macro
H A Ddcn_3_0_0_offset.h482 #define mmCC_DC_PIPE_DIS … macro