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Searched refs:mmBL_PWM_GRP1_REG_LOCK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h477 #define mmBL_PWM_GRP1_REG_LOCK 0x1921 macro
H A Ddce_8_0_d.h1289 #define mmBL_PWM_GRP1_REG_LOCK 0x1921 macro
H A Ddce_10_0_d.h1576 #define mmBL_PWM_GRP1_REG_LOCK 0x4823 macro
H A Ddce_11_0_d.h1401 #define mmBL_PWM_GRP1_REG_LOCK 0x4823 macro
H A Ddce_11_2_d.h1481 #define mmBL_PWM_GRP1_REG_LOCK 0x4823 macro
H A Ddce_12_0_offset.h1866 #define mmBL_PWM_GRP1_REG_LOCK macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5495 #define mmBL_PWM_GRP1_REG_LOCK macro
H A Ddcn_1_0_offset.h10409 #define mmBL_PWM_GRP1_REG_LOCK macro
H A Ddcn_2_1_0_offset.h11367 #define mmBL_PWM_GRP1_REG_LOCK macro
H A Ddcn_3_0_2_offset.h11467 #define mmBL_PWM_GRP1_REG_LOCK macro
H A Ddcn_2_0_0_offset.h12784 #define mmBL_PWM_GRP1_REG_LOCK macro
H A Ddcn_3_0_0_offset.h12623 #define mmBL_PWM_GRP1_REG_LOCK macro