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Searched refs:mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h451 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x179E macro
H A Ddce_8_0_d.h5499 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x179e macro
H A Ddce_10_0_d.h6790 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x17bc macro
H A Ddce_11_0_d.h6952 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x17bc macro
H A Ddce_11_2_d.h8297 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x17bc macro
H A Ddce_12_0_offset.h3378 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h1125 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
H A Ddcn_3_0_1_offset.h1326 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
H A Ddcn_1_0_offset.h1766 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
H A Ddcn_2_1_0_offset.h1372 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
H A Ddcn_3_0_2_offset.h1298 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
H A Ddcn_2_0_0_offset.h1410 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro
H A Ddcn_3_0_0_offset.h1316 #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX … macro