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Searched refs:misc2 (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/comedi/drivers/
H A Dcb_das16_cs.c112 unsigned short misc2; member
161 devpriv->misc2 &= ~(DAS16CS_MISC2_BME | DAS16CS_MISC2_AI_GAIN_MASK); in das16cs_ai_insn_read()
164 devpriv->misc2 |= DAS16CS_MISC2_AI_GAIN_1; in das16cs_ai_insn_read()
167 devpriv->misc2 |= DAS16CS_MISC2_AI_GAIN_2; in das16cs_ai_insn_read()
170 devpriv->misc2 |= DAS16CS_MISC2_AI_GAIN_4; in das16cs_ai_insn_read()
173 devpriv->misc2 |= DAS16CS_MISC2_AI_GAIN_8; in das16cs_ai_insn_read()
176 outw(devpriv->misc2, dev->iobase + DAS16CS_MISC2_REG); in das16cs_ai_insn_read()
275 devpriv->misc2 |= DAS16CS_MISC2_UDIR; in das16cs_dio_insn_config()
277 devpriv->misc2 &= ~DAS16CS_MISC2_UDIR; in das16cs_dio_insn_config()
279 devpriv->misc2 |= DAS16CS_MISC2_LDIR; in das16cs_dio_insn_config()
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/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/
H A Ddr_ste_v1.c1575 struct mlx5dr_match_misc2 *misc2 = &value->misc2; in dr_ste_v1_build_mpls_tag() local
1578 DR_STE_SET_MPLS(mpls_v1, misc2, inner, tag); in dr_ste_v1_build_mpls_tag()
1580 DR_STE_SET_MPLS(mpls_v1, misc2, outer, tag); in dr_ste_v1_build_mpls_tag()
1626 struct mlx5dr_match_misc2 *misc2 = &value->misc2; in dr_ste_v1_build_tnl_mpls_tag() local
1628 if (DR_STE_IS_OUTER_MPLS_OVER_GRE_SET(misc2)) { in dr_ste_v1_build_tnl_mpls_tag()
1630 misc2, outer_first_mpls_over_gre_label); in dr_ste_v1_build_tnl_mpls_tag()
1633 misc2, outer_first_mpls_over_gre_exp); in dr_ste_v1_build_tnl_mpls_tag()
1636 misc2, outer_first_mpls_over_gre_s_bos); in dr_ste_v1_build_tnl_mpls_tag()
1639 misc2, outer_first_mpls_over_gre_ttl); in dr_ste_v1_build_tnl_mpls_tag()
1642 misc2, outer_first_mpls_over_udp_label); in dr_ste_v1_build_tnl_mpls_tag()
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H A Ddr_matcher.c296 static bool dr_mask_is_wqe_metadata_set(struct mlx5dr_match_misc2 *misc2) in dr_mask_is_wqe_metadata_set() argument
298 return misc2->metadata_reg_a; in dr_mask_is_wqe_metadata_set()
301 static bool dr_mask_is_reg_c_0_3_set(struct mlx5dr_match_misc2 *misc2) in dr_mask_is_reg_c_0_3_set() argument
303 return (misc2->metadata_reg_c_0 || misc2->metadata_reg_c_1 || in dr_mask_is_reg_c_0_3_set()
304 misc2->metadata_reg_c_2 || misc2->metadata_reg_c_3); in dr_mask_is_reg_c_0_3_set()
307 static bool dr_mask_is_reg_c_4_7_set(struct mlx5dr_match_misc2 *misc2) in dr_mask_is_reg_c_4_7_set() argument
309 return (misc2->metadata_reg_c_4 || misc2->metadata_reg_c_5 || in dr_mask_is_reg_c_4_7_set()
310 misc2->metadata_reg_c_6 || misc2->metadata_reg_c_7); in dr_mask_is_reg_c_4_7_set()
362 return DR_MASK_IS_OUTER_MPLS_OVER_GRE_SET(&mask->misc2) && in dr_mask_is_tnl_mpls_over_gre()
374 return DR_MASK_IS_OUTER_MPLS_OVER_UDP_SET(&mask->misc2) && in dr_mask_is_tnl_mpls_over_udp()
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H A Ddr_ste_v0.c1220 struct mlx5dr_match_misc2 *misc2 = &value->misc2; in dr_ste_v0_build_mpls_tag() local
1223 DR_STE_SET_MPLS(mpls, misc2, inner, tag); in dr_ste_v0_build_mpls_tag()
1225 DR_STE_SET_MPLS(mpls, misc2, outer, tag); in dr_ste_v0_build_mpls_tag()
1277 struct mlx5dr_match_misc2 *misc_2 = &value->misc2; in dr_ste_v0_build_tnl_mpls_tag()
1320 struct mlx5dr_match_misc2 *misc2 = &value->misc2; in dr_ste_v0_build_tnl_mpls_over_udp_tag() local
1325 mpls_hdr = misc2->outer_first_mpls_over_udp_label << HDR_MPLS_OFFSET_LABEL; in dr_ste_v0_build_tnl_mpls_over_udp_tag()
1326 misc2->outer_first_mpls_over_udp_label = 0; in dr_ste_v0_build_tnl_mpls_over_udp_tag()
1327 mpls_hdr |= misc2->outer_first_mpls_over_udp_exp << HDR_MPLS_OFFSET_EXP; in dr_ste_v0_build_tnl_mpls_over_udp_tag()
1328 misc2->outer_first_mpls_over_udp_exp = 0; in dr_ste_v0_build_tnl_mpls_over_udp_tag()
1329 mpls_hdr |= misc2->outer_first_mpls_over_udp_s_bos << HDR_MPLS_OFFSET_S_BOS; in dr_ste_v0_build_tnl_mpls_over_udp_tag()
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H A Ddr_dbg.c651 dr_dump_hex_print(dump, (char *)&mask->misc2, sizeof(mask->misc2)); in dr_dump_matcher_mask()
H A Ddr_rule.c980 s_idx = offsetof(struct mlx5dr_match_param, misc2); in dr_rule_verify()
981 e_idx = min(s_idx + sizeof(param->misc2), value_size); in dr_rule_verify()
H A Ddr_types.h815 struct mlx5dr_match_misc2 misc2; member
H A Ddr_ste.c1081 dr_ste_copy_mask_misc2(buff, &set_param->misc2, clr); in mlx5dr_ste_copy_param()
/linux/drivers/soc/tegra/
H A Dari-tegra186.c50 u64 addr, misc1, misc2; in tegra186_ari_panic_handler() local
57 MCA_ARI_RW_SUBIDX_MSC2, 0, &misc2); in tegra186_ari_panic_handler()
62 bank_names[i], status, addr, misc1, misc2); in tegra186_ari_panic_handler()
/linux/drivers/pcmcia/
H A Di82365.c136 u_char misc1, misc2; member
300 p->misc2 = i365_get(s, PD67_MISC_CTL_2); in cirrus_get_state()
312 i365_set(s, PD67_MISC_CTL_2, p->misc2); in cirrus_set_state()
328 flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring); in cirrus_set_opts()
329 flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode); in cirrus_set_opts()
330 flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass); in cirrus_set_opts()
331 if (p->misc2 & PD67_MC2_IRQ15_RI) in cirrus_set_opts()
333 if (p->misc2 & PD67_MC2_DYNAMIC_MODE) in cirrus_set_opts()
335 if (p->misc2 & PD67_MC2_FREQ_BYPASS) in cirrus_set_opts()
339 if (p->misc2 & PD67_MC2_IRQ15_RI) in cirrus_set_opts()
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/tc/
H A Dpost_meter.c85 void *misc2, *match_criteria; in mlx5e_post_meter_rate_fg_create() local
97 misc2 = MLX5_ADDR_OF(fte_match_param, match_criteria, misc_parameters_2); in mlx5e_post_meter_rate_fg_create()
98 MLX5_SET(fte_match_set_misc2, misc2, metadata_reg_c_5, MLX5_PACKET_COLOR_MASK); in mlx5e_post_meter_rate_fg_create()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c2043 u32 misc, u32 misc2) in radeon_atombios_parse_misc_flags_1_3()
2046 rdev->pm.power_state[state_index].misc2 = misc2; in radeon_atombios_parse_misc_flags_1_3()
2066 if (misc2 & ATOM_PM_MISCINFO2_SYSTEM_AC_LITE_MODE) in radeon_atombios_parse_misc_flags_1_3()
2084 u32 misc, misc2 = 0; in radeon_atombios_parse_power_table_1_3()
2185 misc2 = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo2); in radeon_atombios_parse_power_table_1_3()
2206 radeon_atombios_parse_misc_flags_1_3(rdev, state_index, misc, misc2); in radeon_atombios_parse_power_table_1_3()
2221 misc2 = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo2); in radeon_atombios_parse_power_table_1_3()
2240 if (misc2 & ATOM_PM_MISCINFO2_VDDCI_DYNAMIC_VOLTAGE_EN) { in radeon_atombios_parse_power_table_1_3()
2248 radeon_atombios_parse_misc_flags_1_3(rdev, state_index, misc, misc2); in radeon_atombios_parse_power_table_1_3()
2045 radeon_atombios_parse_misc_flags_1_3(struct radeon_device * rdev,int state_index,u32 misc,u32 misc2) radeon_atombios_parse_misc_flags_1_3() argument
2086 u32 misc, misc2 = 0; radeon_atombios_parse_power_table_1_3() local
2408 u32 misc2 = le16_to_cpu(non_clock_info->usClassification); radeon_atombios_parse_pplib_non_clock_info() local
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H A Dradeon_combios.c2625 u16 offset, misc, misc2 = 0; in radeon_get_legacy_connector_info_from_bios()
2730 misc2 = RBIOS16(offset + 0x5 + 0xe); in radeon_combios_get_power_modes()
2732 rdev->pm.power_state[state_index].misc2 = misc2; in radeon_combios_get_power_modes()
2758 switch ((misc2 & 0x700) >> 8) { in radeon_combios_get_power_modes()
2641 u16 offset, misc, misc2 = 0; radeon_combios_get_power_modes() local
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Deswitch_offloads.c111 void *misc2; in mlx5_eswitch_clear_rule_source_port() local
113 misc2 = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_2); in mlx5_eswitch_clear_rule_source_port()
114 MLX5_SET(fte_match_set_misc2, misc2, metadata_reg_c_0, 0); in mlx5_eswitch_clear_rule_source_port()
116 misc2 = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters_2); in mlx5_eswitch_clear_rule_source_port()
117 MLX5_SET(fte_match_set_misc2, misc2, metadata_reg_c_0, 0); in mlx5_eswitch_clear_rule_source_port()
119 if (!memchr_inv(misc2, 0, MLX5_ST_SZ_BYTES(fte_match_set_misc2))) in mlx5_eswitch_clear_rule_source_port()
133 void *misc2; in mlx5_eswitch_set_rule_source_port() local
150 misc2 = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_2); in mlx5_eswitch_set_rule_source_port()
151 MLX5_SET(fte_match_set_misc2, misc2, metadata_reg_c_0, metadata); in mlx5_eswitch_set_rule_source_port()
153 misc2 = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters_2); in mlx5_eswitch_set_rule_source_port()
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