Searched refs:min_fill_clk_mhz (Results 1 – 14 of 14) sorted by relevance
468 …ranges->reader_wm_sets[num_valid_sets].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MI… in build_watermark_ranges()483 …ranges->reader_wm_sets[num_valid_sets].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MI… in build_watermark_ranges()498 ranges->reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()505 ranges->writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()
78 uint16_t min_fill_clk_mhz; member
490 ranges->reader_wm_sets[i].min_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()502 ranges->writer_wm_sets[i].min_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()
1335 ranges.reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1350 ranges.reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1357 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()
1395 ranges.reader_wm_sets[0].min_fill_clk_mhz = min_fclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1398 ranges.writer_wm_sets[0].min_fill_clk_mhz = socclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1407 ranges.reader_wm_sets[0].min_fill_clk_mhz = 800; in dcn_bw_notify_pplib_of_wm_ranges()1410 ranges.writer_wm_sets[0].min_fill_clk_mhz = 200; in dcn_bw_notify_pplib_of_wm_ranges()
683 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()693 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
394 …ranges->reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_… in dcn301_fpu_set_wm_ranges()
1084 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()1096 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
502 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()512 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
2576 ranges.reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2592 ranges.reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2599 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()
1618 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()1628 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1891 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1901 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
2189 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()2199 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2138 …ranges->reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_… in dcn20_fpu_set_wm_ranges()