Home
last modified time | relevance | path

Searched refs:min_fclk_khz (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/inc/
H A Ddml2_internal_shared_types.h20 unsigned long min_fclk_khz; member
403 unsigned int min_fclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1358 int *min_fclk_khz, in dcn_get_soc_clks() argument
1362 *min_fclk_khz = dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 * 1000000 / 32; in dcn_get_soc_clks()
1369 int min_fclk_khz, in dcn_bw_notify_pplib_of_wm_ranges() argument
1395 ranges.reader_wm_sets[0].min_fill_clk_mhz = min_fclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1400 ranges.writer_wm_sets[0].min_drain_clk_mhz = min_fclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c1356 int min_fclk_khz, min_dcfclk_khz, socclk_khz; in dcn10_resource_construct() local
1579 dc, &min_fclk_khz, &min_dcfclk_khz, &socclk_khz); in dcn10_resource_construct()
1582 dc, min_fclk_khz, min_dcfclk_khz, socclk_khz); in dcn10_resource_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c3340 int min_fclk_khz, min_dcfclk_khz, socclk_khz; in dcn10_prepare_bandwidth() local
3362 dc, &min_fclk_khz, &min_dcfclk_khz, &socclk_khz); in dcn10_prepare_bandwidth()
3365 dc, min_fclk_khz, min_dcfclk_khz, socclk_khz); in dcn10_prepare_bandwidth()
3378 int min_fclk_khz, min_dcfclk_khz, socclk_khz; in dcn10_optimize_bandwidth() local
3401 dc, &min_fclk_khz, &min_dcfclk_khz, &socclk_khz); in dcn10_optimize_bandwidth()
3404 dc, min_fclk_khz, min_dcfclk_khz, socclk_khz); in dcn10_optimize_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c45 *fclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_fclk_khz; in get_minimum_clocks_for_latency()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c7972 …= ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].min_fclk_khz / 1000); in dml_core_mode_support()
10500 …%ld\n", __func__, min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].min_fclk_khz); in dml_core_mode_programming()