Searched refs:min_bpp (Results 1 – 2 of 2) sorted by relevance
2347 return pipe_bpp >= limits->pipe.min_bpp && in is_dsc_pipe_bpp_sufficient()2644 if (max_link_bpp_x16 < fxp_q4_from_int(limits->pipe.min_bpp)) in intel_dp_compute_config_link_bpp_limits()2647 limits->link.min_bpp_x16 = fxp_q4_from_int(limits->pipe.min_bpp); in intel_dp_compute_config_link_bpp_limits()2693 limits->pipe.min_bpp = max(limits->pipe.min_bpp, dsc_min_bpc * 3); in intel_dp_dsc_compute_pipe_bpp_limits()2694 limits->pipe.min_bpp = align_min_sink_dsc_input_bpp(connector, limits->pipe.min_bpp); in intel_dp_dsc_compute_pipe_bpp_limits()2699 if (limits->pipe.min_bpp <= 0 || in intel_dp_dsc_compute_pipe_bpp_limits()2700 limits->pipe.min_bpp > limits->pipe.max_bpp) { in intel_dp_dsc_compute_pipe_bpp_limits()2705 orig_limits.pipe.min_bpp, orig_limits.pipe.max_bpp, in intel_dp_dsc_compute_pipe_bpp_limits()2706 limits->pipe.min_bpp, limits->pipe.max_bpp); in intel_dp_dsc_compute_pipe_bpp_limits()2735 limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); in intel_dp_compute_config_limits()[all …]
1576 u32 min_bpp; in dw_dp_bridge_mode_valid() local1581 min_bpp = 12; in dw_dp_bridge_mode_valid()1583 min_bpp = 16; in dw_dp_bridge_mode_valid()1585 min_bpp = 18; in dw_dp_bridge_mode_valid()1587 min_bpp = 24; in dw_dp_bridge_mode_valid()1593 if (!dw_dp_bandwidth_ok(dp, mode, min_bpp, link->lanes, link->rate)) in dw_dp_bridge_mode_valid()