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Searched refs:mg_pll_div0 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c3100 hw_state->mg_pll_div0 = DKL_PLL_DIV0_INTEG_COEFF(int_coeff) | in icl_calc_mg_pll_state()
3107 hw_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(val); in icl_calc_mg_pll_state()
3126 hw_state->mg_pll_div0 = in icl_calc_mg_pll_state()
3206 m1 = hw_state->mg_pll_div0 & DKL_PLL_DIV0_FBPREDIV_MASK; in icl_ddi_mg_pll_get_freq()
3208 m2_int = hw_state->mg_pll_div0 & DKL_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()
3219 m2_int = hw_state->mg_pll_div0 & MG_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()
3221 if (hw_state->mg_pll_div0 & MG_PLL_DIV0_FRACNEN_H) { in icl_ddi_mg_pll_get_freq()
3222 m2_frac = hw_state->mg_pll_div0 & in icl_ddi_mg_pll_get_freq()
3574 hw_state->mg_pll_div0 = intel_de_read(i915, MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state()
3643 hw_state->mg_pll_div0 = intel_dkl_phy_read(i915, DKL_PLL_DIV0(tc_port)); in dkl_pll_get_hw_state()
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H A Dintel_dpll_mgr.h221 u32 mg_pll_div0; member