Searched refs:meta_req_height (Results 1 – 11 of 11) sorted by relevance
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
H A D | display_rq_dlg_calc_21.c | 362 unsigned int meta_req_height; in get_meta_and_pte_attr() local 485 meta_req_height = 1 << log2_meta_req_height; in get_meta_and_pte_attr() 496 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_meta_and_pte_attr() 497 + meta_req_height; in get_meta_and_pte_attr() 498 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_meta_and_pte_attr() 547 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
|
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | display_rq_dlg_calc_20.c | 372 unsigned int meta_req_height; in get_meta_and_pte_attr() local 491 meta_req_height = 1 << log2_meta_req_height; in get_meta_and_pte_attr() 502 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_meta_and_pte_attr() 503 + meta_req_height; in get_meta_and_pte_attr() 504 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_meta_and_pte_attr() 550 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
|
H A D | display_rq_dlg_calc_20v2.c | 372 unsigned int meta_req_height; in get_meta_and_pte_attr() local 491 meta_req_height = 1 << log2_meta_req_height; in get_meta_and_pte_attr() 502 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_meta_and_pte_attr() 503 + meta_req_height; in get_meta_and_pte_attr() 504 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_meta_and_pte_attr() 550 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_meta_and_pte_attr()
|
/linux/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | dml1_display_rq_dlg_calc.c | 583 unsigned int meta_req_height; in get_surf_rq_param() local 726 meta_req_height = 1 << log2_meta_req_height; in get_surf_rq_param() 740 meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) in get_surf_rq_param() 741 + meta_req_height; in get_surf_rq_param() 742 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; in get_surf_rq_param() 783 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; in get_surf_rq_param()
|
H A D | display_mode_vba.h | 831 unsigned int meta_req_height[DC__NUM_DPP__MAX]; member
|
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | display_mode_vba_util_32.h | 399 unsigned int meta_req_height[], 914 unsigned int meta_req_height[],
|
H A D | display_mode_vba_32.c | 495 v->meta_req_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1311 v->meta_req_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
|
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
H A D | dml2_core_shared_types.h | 630 unsigned int meta_req_height[DML2_MAX_PLANES]; member 1486 unsigned int *meta_req_height; member
|
H A D | dml2_core_shared.c | 9224 meta_chunk_threshold = 2 * min_meta_chunk_width - p->meta_req_height[k]; in CalculateMetaAndPTETimes() 10266 CalculateVMRowAndSwath_params->meta_req_height_luma = mode_lib->mp.meta_req_height; in dml2_core_shared_mode_programming() 11178 CalculateMetaAndPTETimes_params->meta_req_height = mode_lib->mp.meta_req_height; in dml2_core_shared_mode_programming()
|
/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | display_mode_core_structs.h | 1008 dml_uint_t meta_req_height[__DML_NUM_PLANES__]; member 1365 dml_uint_t *meta_req_height; member
|
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_mode_vba_31.c | 423 int meta_req_height[], 2396 &v->meta_req_height[k], 3030 v->meta_req_height, 6043 int meta_req_height[], argument 6113 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height[k];
|