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Searched refs:mes (Results 1 – 25 of 33) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mes.c46 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_kernel_doorbell_get() local
53 found = find_next_zero_bit(mes->doorbell_bitmap, mes->num_mes_dbs, offset); in amdgpu_mes_kernel_doorbell_get()
54 if (found >= mes->num_mes_dbs) { in amdgpu_mes_kernel_doorbell_get()
59 set_bit(found, mes->doorbell_bitmap); in amdgpu_mes_kernel_doorbell_get()
62 *doorbell_index = mes->db_start_dw_offset + found * 2; in amdgpu_mes_kernel_doorbell_get()
70 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_kernel_doorbell_free() local
73 rel_index = (doorbell_index - mes->db_start_dw_offset) / 2; in amdgpu_mes_kernel_doorbell_free()
74 old = test_and_clear_bit(rel_index, mes->doorbell_bitmap); in amdgpu_mes_kernel_doorbell_free()
81 struct amdgpu_mes *mes = &adev->mes; in amdgpu_mes_doorbell_init() local
84 mes->doorbell_bitmap = bitmap_zalloc(PAGE_SIZE / sizeof(u32), GFP_KERNEL); in amdgpu_mes_doorbell_init()
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H A Dmes_v12_0.c145 static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v12_0_submit_pkt_and_poll_completion() argument
151 struct amdgpu_device *adev = mes->adev; in mes_v12_0_submit_pkt_and_poll_completion()
152 struct amdgpu_ring *ring = &mes->ring[pipe]; in mes_v12_0_submit_pkt_and_poll_completion()
153 spinlock_t *ring_lock = &mes->ring_lock[pipe]; in mes_v12_0_submit_pkt_and_poll_completion()
277 static int mes_v12_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v12_0_add_hw_queue() argument
280 struct amdgpu_device *adev = mes->adev; in mes_v12_0_add_hw_queue()
328 return mes_v12_0_submit_pkt_and_poll_completion(mes, in mes_v12_0_add_hw_queue()
334 static int mes_v12_0_remove_hw_queue(struct amdgpu_mes *mes, in mes_v12_0_remove_hw_queue() argument
348 return mes_v12_0_submit_pkt_and_poll_completion(mes, in mes_v12_0_remove_hw_queue()
386 static int mes_v12_0_reset_queue_mmio(struct amdgpu_mes *mes, uint32_t queue_type, in mes_v12_0_reset_queue_mmio() argument
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H A Dmes_v11_0.c159 static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v11_0_submit_pkt_and_poll_completion() argument
165 struct amdgpu_device *adev = mes->adev; in mes_v11_0_submit_pkt_and_poll_completion()
166 struct amdgpu_ring *ring = &mes->ring[0]; in mes_v11_0_submit_pkt_and_poll_completion()
195 spin_lock_irqsave(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
225 spin_unlock_irqrestore(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
267 spin_unlock_irqrestore(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
287 static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v11_0_add_hw_queue() argument
290 struct amdgpu_device *adev = mes->adev; in mes_v11_0_add_hw_queue()
316 if (((adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK) >> in mes_v11_0_add_hw_queue()
340 return mes_v11_0_submit_pkt_and_poll_completion(mes, in mes_v11_0_add_hw_queue()
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H A Damdgpu_mes.h370 int (*add_hw_queue)(struct amdgpu_mes *mes,
373 int (*remove_hw_queue)(struct amdgpu_mes *mes,
376 int (*map_legacy_queue)(struct amdgpu_mes *mes,
379 int (*unmap_legacy_queue)(struct amdgpu_mes *mes,
382 int (*suspend_gang)(struct amdgpu_mes *mes,
385 int (*resume_gang)(struct amdgpu_mes *mes,
388 int (*misc_op)(struct amdgpu_mes *mes,
391 int (*reset_legacy_queue)(struct amdgpu_mes *mes,
394 int (*reset_hw_queue)(struct amdgpu_mes *mes,
398 #define amdgpu_mes_kiq_hw_init(adev) (adev)->mes.kiq_hw_init((adev))
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H A Damdgpu_dev_coredump.c175 version = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_devcoredump_fw_info()
176 feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) >> in amdgpu_devcoredump_fw_info()
181 version = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_devcoredump_fw_info()
182 feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) >> in amdgpu_devcoredump_fw_info()
H A Damdgpu_doorbell_mgr.c158 adev->mes.db_start_dw_offset = size / sizeof(u32); in amdgpu_doorbell_create_kernel_doorbells()
H A Damdgpu_virt.c617 vf2pf_info->mes_info_addr = (uint64_t)adev->mes.resource_1_gpu_addr; in amdgpu_virt_write_vf2pf_data()
619 if (adev->mes.resource_1) { in amdgpu_virt_write_vf2pf_data()
620 vf2pf_info->mes_info_size = adev->mes.resource_1->tbo.base.size; in amdgpu_virt_write_vf2pf_data()
876 adev->mes.ring[0].sched.ready = false; in amdgpu_virt_post_reset()
H A Damdgpu_gmc.c592 if (ring == &adev->mes.ring[0] || in amdgpu_gmc_allocate_vm_inv_eng()
593 ring == &adev->mes.ring[1] || in amdgpu_gmc_allocate_vm_inv_eng()
765 if (adev->mes.ring[0].sched.ready) { in amdgpu_gmc_fw_reg_write_reg_wait()
H A Damdgpu_kms.c350 fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
351 fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
355 fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
356 fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
H A Damdgpu_gfx.c660 if (adev->mes.enable_legacy_queue_map) in amdgpu_gfx_enable_kcq()
728 if (adev->mes.enable_legacy_queue_map) { in amdgpu_gfx_enable_kgq()
1038 if (adev->mes.ring[0].sched.ready) in amdgpu_kiq_rreg()
1111 if (adev->mes.ring[0].sched.ready) { in amdgpu_kiq_wreg()
H A Dsdma_v7_0.c1545 spin_lock(&adev->mes.queue_id_lock); in sdma_v7_0_process_trap_irq()
1546 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v7_0_process_trap_irq()
1551 spin_unlock(&adev->mes.queue_id_lock); in sdma_v7_0_process_trap_irq()
H A Dsdma_v6_0.c1566 spin_lock(&adev->mes.queue_id_lock); in sdma_v6_0_process_trap_irq()
1567 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v6_0_process_trap_irq()
1572 spin_unlock(&adev->mes.queue_id_lock); in sdma_v6_0_process_trap_irq()
H A Dsdma_v5_2.c1638 spin_lock(&adev->mes.queue_id_lock); in sdma_v5_2_process_trap_irq()
1639 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v5_2_process_trap_irq()
1644 spin_unlock(&adev->mes.queue_id_lock); in sdma_v5_2_process_trap_irq()
H A Dsdma_v5_0.c1740 spin_lock(&adev->mes.queue_id_lock); in sdma_v5_0_process_trap_irq()
1741 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in sdma_v5_0_process_trap_irq()
1746 spin_unlock(&adev->mes.queue_id_lock); in sdma_v5_0_process_trap_irq()
H A Damdgpu_ucode.c768 FW_VERSION_ATTR(mes_fw_version, 0444, mes.sched_version & AMDGPU_MES_VERSION_MASK);
769 FW_VERSION_ATTR(mes_kiq_fw_version, 0444, mes.kiq_version & AMDGPU_MES_VERSION_MASK);
H A Dgfx_v12_0.c1225 adev->mes.fw[pipe]->data; in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1227 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1233 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1360 adev->mes.fw_version[0] >= 100) in gfx_v12_0_sw_init()
3419 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v12_0_cp_resume()
4805 spin_lock(&adev->mes.queue_id_lock); in gfx_v12_0_eop_irq()
4806 queue = idr_find(&adev->mes.queue_id_idr, mes_queue_id); in gfx_v12_0_eop_irq()
4811 spin_unlock(&adev->mes.queue_id_lock); in gfx_v12_0_eop_irq()
H A Damdgpu_drv.c688 MODULE_PARM_DESC(mes,
690 module_param_named(mes, amdgpu_mes, int, 0444);
/linux/tools/testing/cxl/test/
H A Dmem.c159 struct mock_event_store mes; member
172 return &mdata->mes.mock_logs[log_type]; in event_find_log()
206 static void mes_add_event(struct mock_event_store *mes, in mes_add_event() argument
215 log = &mes->mock_logs[log_type]; in mes_add_event()
339 struct mock_event_store *mes = &mdata->mes; in cxl_mock_event_trigger() local
350 cxl_mem_get_event_records(mdata->mds, mes->ev_status); in cxl_mock_event_trigger()
491 static void cxl_mock_add_event_logs(struct mock_event_store *mes) in cxl_mock_add_event_logs() argument
505 mes_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed); in cxl_mock_add_event_logs()
506 mes_add_event(mes, CXL_EVENT_TYPE_INFO, in cxl_mock_add_event_logs()
508 mes_add_event(mes, CXL_EVENT_TYPE_INFO, in cxl_mock_add_event_logs()
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/linux/tools/power/cpupower/utils/idle_monitor/
H A Dcpupower-monitor.h71 #define print_overflow_err(mes, ov) \ argument
75 "could be inaccurate\n"), mes, ov); \
/linux/drivers/misc/sgi-gru/
H A Dgrukservices.c998 char mes[GRU_CACHE_LINE_BYTES], *m; in quicktest1() local
1005 memset(mes, 0xee, sizeof(mes)); in quicktest1()
1009 mes[8] = i; in quicktest1()
1011 ret = gru_send_message_gpa(&mqd, mes, sizeof(mes)); in quicktest1()
/linux/drivers/net/arcnet/
H A Dcapmode.c178 ((unsigned char *)&pkt->soft.cap.mes), length - 1); in prepare_tx()
213 ackpkt->soft.cap.mes.ack = acked; in ack_tx()
/linux/include/uapi/linux/
H A Dif_arcnet.h94 } mes; member
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_debug.h139 (dev->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 70) || in kfd_dbg_has_ttmps_always_setup()
H A Dkfd_device_queue_manager.c269 amdgpu_mes_lock(&adev->mes); in add_queue_mes()
270 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in add_queue_mes()
271 amdgpu_mes_unlock(&adev->mes); in add_queue_mes()
299 amdgpu_mes_lock(&adev->mes); in remove_queue_mes()
300 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input); in remove_queue_mes()
301 amdgpu_mes_unlock(&adev->mes); in remove_queue_mes()
/linux/drivers/media/i2c/
H A Dsaa717x.c1102 char *mes[4] = { in saa717x_s_tuner() local
1124 mes[audio_mode]); in saa717x_s_tuner()

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