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Searched refs:mes (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v12_0.c149 static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v12_0_submit_pkt_and_poll_completion() argument
155 struct amdgpu_device *adev = mes->adev; in mes_v12_0_submit_pkt_and_poll_completion()
156 struct amdgpu_ring *ring = &mes->ring[pipe]; in mes_v12_0_submit_pkt_and_poll_completion()
157 spinlock_t *ring_lock = &mes->ring_lock[pipe]; in mes_v12_0_submit_pkt_and_poll_completion()
303 static int mes_v12_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v12_0_add_hw_queue() argument
306 struct amdgpu_device *adev = mes->adev; in mes_v12_0_add_hw_queue()
354 return mes_v12_0_submit_pkt_and_poll_completion(mes, in mes_v12_0_add_hw_queue()
360 static int mes_v12_0_remove_hw_queue(struct amdgpu_mes *mes, in mes_v12_0_remove_hw_queue() argument
364 uint32_t mes_rev = mes->sched_version & AMDGPU_MES_VERSION_MASK; in mes_v12_0_remove_hw_queue()
378 return mes_v12_0_submit_pkt_and_poll_completion(mes, in mes_v12_0_remove_hw_queue()
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H A Dmes_v11_0.c173 static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v11_0_submit_pkt_and_poll_completion() argument
179 struct amdgpu_device *adev = mes->adev; in mes_v11_0_submit_pkt_and_poll_completion()
180 struct amdgpu_ring *ring = &mes->ring[0]; in mes_v11_0_submit_pkt_and_poll_completion()
209 spin_lock_irqsave(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
239 spin_unlock_irqrestore(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
281 spin_unlock_irqrestore(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
318 static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v11_0_add_hw_queue() argument
321 struct amdgpu_device *adev = mes->adev; in mes_v11_0_add_hw_queue()
347 if (((adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK) >> in mes_v11_0_add_hw_queue()
371 return mes_v11_0_submit_pkt_and_poll_completion(mes, in mes_v11_0_add_hw_queue()
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H A Dmes_v12_1.c152 static int mes_v12_1_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v12_1_submit_pkt_and_poll_completion() argument
158 struct amdgpu_device *adev = mes->adev; in mes_v12_1_submit_pkt_and_poll_completion()
159 struct amdgpu_ring *ring = &mes->ring[MES_PIPE_INST(xcc_id, pipe)]; in mes_v12_1_submit_pkt_and_poll_completion()
160 spinlock_t *ring_lock = &mes->ring_lock[MES_PIPE_INST(xcc_id, pipe)]; in mes_v12_1_submit_pkt_and_poll_completion()
286 static int mes_v12_1_add_hw_queue(struct amdgpu_mes *mes, in mes_v12_1_add_hw_queue() argument
293 if (mes->enable_coop_mode) in mes_v12_1_add_hw_queue()
294 xcc_id = mes->master_xcc_ids[inst]; in mes_v12_1_add_hw_queue()
341 return mes_v12_1_submit_pkt_and_poll_completion(mes, in mes_v12_1_add_hw_queue()
347 static int mes_v12_1_remove_hw_queue(struct amdgpu_mes *mes, in mes_v12_1_remove_hw_queue() argument
354 if (mes->enable_coop_mode) in mes_v12_1_remove_hw_queue()
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H A Damdgpu_mes.h408 int (*add_hw_queue)(struct amdgpu_mes *mes,
411 int (*remove_hw_queue)(struct amdgpu_mes *mes,
414 int (*map_legacy_queue)(struct amdgpu_mes *mes,
417 int (*unmap_legacy_queue)(struct amdgpu_mes *mes,
420 int (*suspend_gang)(struct amdgpu_mes *mes,
423 int (*resume_gang)(struct amdgpu_mes *mes,
426 int (*misc_op)(struct amdgpu_mes *mes,
429 int (*reset_hw_queue)(struct amdgpu_mes *mes,
432 int (*detect_and_reset_hung_queues)(struct amdgpu_mes *mes,
436 int (*invalidate_tlbs_pasid)(struct amdgpu_mes *mes,
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H A Dmes_userqueue.c146 amdgpu_mes_lock(&adev->mes); in mes_userq_map()
147 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in mes_userq_map()
148 amdgpu_mes_unlock(&adev->mes); in mes_userq_map()
170 amdgpu_mes_lock(&adev->mes); in mes_userq_unmap()
171 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input); in mes_userq_unmap()
172 amdgpu_mes_unlock(&adev->mes); in mes_userq_unmap()
226 amdgpu_mes_lock(&adev->mes); in mes_userq_detect_and_reset()
229 amdgpu_mes_unlock(&adev->mes); in mes_userq_detect_and_reset()
496 amdgpu_mes_lock(&adev->mes); in mes_userq_preempt()
497 r = adev->mes.funcs->suspend_gang(&adev->mes, &queue_input); in mes_userq_preempt()
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H A Dgmc_v12_1.c379 adev->mes.ring[MES_PIPE_INST(inst, 0)].sched.ready) && in gmc_v12_1_flush_gpu_tlb()
414 if (adev->enable_uni_mes && adev->mes.ring[0].sched.ready && in gmc_v12_1_flush_gpu_tlb_pasid()
415 (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x6f) { in gmc_v12_1_flush_gpu_tlb_pasid()
426 adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input); in gmc_v12_1_flush_gpu_tlb_pasid()
432 adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input); in gmc_v12_1_flush_gpu_tlb_pasid()
436 adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input); in gmc_v12_1_flush_gpu_tlb_pasid()
H A Damdgpu_dev_coredump.c184 version = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_devcoredump_fw_info()
185 feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) >> in amdgpu_devcoredump_fw_info()
190 version = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_devcoredump_fw_info()
191 feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) >> in amdgpu_devcoredump_fw_info()
H A Damdgpu_kms.c354 fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
355 fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
359 fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
360 fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
457 num_slots += hweight32(adev->mes.gfx_hqd_mask[i]); in amdgpu_hw_ip_info()
472 num_slots += hweight32(adev->mes.compute_hqd_mask[i]); in amdgpu_hw_ip_info()
487 num_slots += hweight32(adev->mes.sdma_hqd_mask[i]); in amdgpu_hw_ip_info()
H A Damdgpu_gfx.c718 if (adev->mes.enable_legacy_queue_map) in amdgpu_gfx_enable_kcq()
786 if (adev->mes.enable_legacy_queue_map) { in amdgpu_gfx_enable_kgq()
1142 if (adev->mes.ring[0].sched.ready) in amdgpu_kiq_rreg()
1218 if (adev->mes.ring[0].sched.ready) { in amdgpu_kiq_wreg()
1316 if (adev->enable_mes_kiq && adev->mes.ring[0].sched.ready) in amdgpu_kiq_hdp_flush()
H A Damdgpu_gmc.c678 if (ring == &adev->mes.ring[0] || in amdgpu_gmc_allocate_vm_inv_eng()
679 ring == &adev->mes.ring[1] || in amdgpu_gmc_allocate_vm_inv_eng()
888 if (adev->mes.ring[MES_PIPE_INST(xcc_inst, 0)].sched.ready) { in amdgpu_gmc_fw_reg_write_reg_wait()
H A Damdgpu_amdkfd.c749 ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) || in amdgpu_amdkfd_set_compute_idle()
H A Dgmc_v11_0.c246 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v11_0_flush_gpu_tlb()
H A Dgfx_v12_0.c1301 adev->mes.fw[pipe]->data; in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1303 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1309 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1440 adev->mes.fw_version[0] >= 123) { in gfx_v12_0_sw_init()
1455 adev->mes.fw_version[0] >= 100) in gfx_v12_0_sw_init()
3527 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) { in gfx_v12_0_cp_resume()
H A Dgfx_v11_0.c1507 adev->mes.fw[pipe]->data; in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1509 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1516 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1652 adev->mes.fw_version[0] >= 120) { in gfx_v11_0_sw_init()
1682 adev->mes.fw_version[0] >= 99) { in gfx_v11_0_sw_init()
1697 adev->mes.fw_version[0] >= 128) { in gfx_v11_0_sw_init()
1711 adev->mes.fw_version[0] >= 114) { in gfx_v11_0_sw_init()
4686 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v11_0_cp_resume()
H A Dgfx_v12_1.c1088 adev->mes.fw[pipe]->data; in gfx_v12_1_rlc_backdoor_autoload_copy_mes_ucode()
1090 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_1_rlc_backdoor_autoload_copy_mes_ucode()
1096 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_1_rlc_backdoor_autoload_copy_mes_ucode()
2550 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) { in gfx_v12_1_xcc_cp_resume()
/linux/tools/testing/cxl/test/
H A Dmem.c178 struct mock_event_store mes; member
193 return &mdata->mes.mock_logs[log_type]; in event_find_log()
227 static void mes_add_event(struct mock_event_store *mes, in mes_add_event() argument
236 log = &mes->mock_logs[log_type]; in mes_add_event()
364 struct mock_event_store *mes = &mdata->mes; in cxl_mock_event_trigger() local
375 cxl_mem_get_event_records(mdata->mds, mes->ev_status); in cxl_mock_event_trigger()
516 static void cxl_mock_add_event_logs(struct mock_event_store *mes) in cxl_mock_add_event_logs() argument
530 mes_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed); in cxl_mock_add_event_logs()
531 mes_add_event(mes, CXL_EVENT_TYPE_INFO, in cxl_mock_add_event_logs()
533 mes_add_event(mes, CXL_EVENT_TYPE_INFO, in cxl_mock_add_event_logs()
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/linux/tools/power/cpupower/utils/idle_monitor/
H A Dcpupower-monitor.h71 #define print_overflow_err(mes, ov) \ argument
75 "could be inaccurate\n"), mes, ov); \
/linux/drivers/misc/sgi-gru/
H A Dgrukservices.c998 char mes[GRU_CACHE_LINE_BYTES], *m; in quicktest1() local
1005 memset(mes, 0xee, sizeof(mes)); in quicktest1()
1009 mes[8] = i; in quicktest1()
1011 ret = gru_send_message_gpa(&mqd, mes, sizeof(mes)); in quicktest1()
/linux/include/uapi/linux/
H A Dif_arcnet.h94 } mes; member
/linux/drivers/net/arcnet/
H A Dcapmode.c178 ((unsigned char *)&pkt->soft.cap.mes), length - 1); in prepare_tx()
213 ackpkt->soft.cap.mes.ack = acked; in ack_tx()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_debug.h138 (dev->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 70) || in kfd_dbg_has_ttmps_always_setup()
H A Dkfd_device_queue_manager.c268 amdgpu_mes_lock(&adev->mes); in add_queue_mes()
269 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in add_queue_mes()
270 amdgpu_mes_unlock(&adev->mes); in add_queue_mes()
306 amdgpu_mes_lock(&adev->mes); in remove_queue_mes_on_reset_option()
307 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input); in remove_queue_mes_on_reset_option()
308 amdgpu_mes_unlock(&adev->mes); in remove_queue_mes_on_reset_option()
413 int hqd_info_size = adev->mes.hung_queue_hqd_info_offset; in reset_queues_mes()
1973 int hqd_info_size = adev->mes.hung_queue_hqd_info_offset; in start_cpsch()
H A Dkfd_device.c581 uint32_t mes_rev = node->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in kfd_gws_init()