Searched refs:mec_hdr (Results 1 – 6 of 6) sorted by relevance
2941 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_mec_cache_rs64() local2943 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_mec_cache_rs64()2966 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_mec_cache_rs64()2967 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_mec_cache_rs64()2969 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_mec_cache_rs64()3023 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_gfx_rs64() local3026 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_gfx_rs64()3081 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_gfx_rs64()3082 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_gfx_rs64()3084 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_gfx_rs64()[all …]
2106 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v12_1_xcc_config_gfx_rs64() local2109 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v12_1_xcc_config_gfx_rs64()2116 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v12_1_xcc_config_gfx_rs64()2117 mec_hdr->ucode_start_addr_hi << 30); in gfx_v12_1_xcc_config_gfx_rs64()2119 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v12_1_xcc_config_gfx_rs64()2250 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v12_1_init_cp_compute_microcode_bo() local2259 mec_hdr = (const struct gfx_firmware_header_v2_0 *)adev->gfx.mec_fw->data; in gfx_v12_1_init_cp_compute_microcode_bo()2260 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v12_1_init_cp_compute_microcode_bo()2263 le32_to_cpu(mec_hdr->ucode_offset_bytes)); in gfx_v12_1_init_cp_compute_microcode_bo()2264 fw_ucode_size = le32_to_cpu(mec_hdr->ucode_size_bytes); in gfx_v12_1_init_cp_compute_microcode_bo()[all …]
624 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_4_3_mec_init() local662 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_4_3_mec_init()666 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_4_3_mec_init()667 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_4_3_mec_init()669 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_4_3_mec_init()1689 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_4_3_xcc_cp_compute_load_microcode() local1701 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_4_3_xcc_cp_compute_load_microcode()1702 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_4_3_xcc_cp_compute_load_microcode()1706 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_4_3_xcc_cp_compute_load_microcode()1723 WREG32(mec_ucode_addr_offset, mec_hdr->jt_offset); in gfx_v9_4_3_xcc_cp_compute_load_microcode()[all …]
2146 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v12_0_config_gfx_rs64() local2149 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v12_0_config_gfx_rs64()2204 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v12_0_config_gfx_rs64()2205 mec_hdr->ucode_start_addr_hi << 30); in gfx_v12_0_config_gfx_rs64()2207 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v12_0_config_gfx_rs64()2845 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v12_0_cp_compute_load_microcode_rs64() local2857 mec_hdr = (const struct gfx_firmware_header_v2_0 *)adev->gfx.mec_fw->data; in gfx_v12_0_cp_compute_load_microcode_rs64()2858 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v12_0_cp_compute_load_microcode_rs64()2861 le32_to_cpu(mec_hdr->ucode_offset_bytes)); in gfx_v12_0_cp_compute_load_microcode_rs64()2862 fw_ucode_size = le32_to_cpu(mec_hdr->ucode_size_bytes); in gfx_v12_0_cp_compute_load_microcode_rs64()[all …]
1878 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local1904 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init()1908 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init()1909 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_0_mec_init()1911 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init()3484 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local3494 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode()3495 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode()3499 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode()3512 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()[all …]
4424 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local4451 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init()4454 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init()4455 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init()4457 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init()6658 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local6669 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode()6670 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode()6674 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode()6712 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()[all …]