/linux/drivers/clk/bcm/ |
H A D | clk-ns2.c | 52 .mdiv = REG_VAL(0x18, 0, 8), 58 .mdiv = REG_VAL(0x18, 8, 8), 64 .mdiv = REG_VAL(0x14, 0, 8), 70 .mdiv = REG_VAL(0x14, 8, 8), 76 .mdiv = REG_VAL(0x14, 16, 8), 82 .mdiv = REG_VAL(0x14, 24, 8), 114 .mdiv = REG_VAL(0x18, 0, 8), 120 .mdiv = REG_VAL(0x18, 8, 8), 126 .mdiv = REG_VAL(0x14, 0, 8), 132 .mdiv = REG_VAL(0x14, 8, 8), [all …]
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H A D | clk-sr.c | 52 .mdiv = REG_VAL(0x18, 0, 9), 58 .mdiv = REG_VAL(0x18, 10, 9), 64 .mdiv = REG_VAL(0x18, 20, 9), 70 .mdiv = REG_VAL(0x1c, 0, 9), 76 .mdiv = REG_VAL(0x1c, 10, 9), 82 .mdiv = REG_VAL(0x1c, 20, 9), 112 .mdiv = REG_VAL(0x18, 0, 9), 118 .mdiv = REG_VAL(0x18, 10, 9), 124 .mdiv = REG_VAL(0x18, 20, 9), 130 .mdiv = REG_VAL(0x1c, 0, 9), [all …]
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H A D | clk-cygnus.c | 66 .mdiv = REG_VAL(0x20, 0, 8), 72 .mdiv = REG_VAL(0x20, 10, 8), 78 .mdiv = REG_VAL(0x20, 20, 8), 84 .mdiv = REG_VAL(0x24, 0, 8), 90 .mdiv = REG_VAL(0x24, 10, 8), 96 .mdiv = REG_VAL(0x24, 20, 8), 124 .mdiv = REG_VAL(0x8, 0, 8), 130 .mdiv = REG_VAL(0x8, 10, 8), 136 .mdiv = REG_VAL(0x8, 20, 8), 142 .mdiv = REG_VAL(0xc, 0, 8), [all …]
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H A D | clk-iproc-armpll.c | 109 int mdiv; in __get_mdiv() local 117 mdiv = 1; in __get_mdiv() 122 mdiv = val & IPROC_CLK_PLLARMC_MDIV_MASK; in __get_mdiv() 123 if (mdiv == 0) in __get_mdiv() 124 mdiv = 256; in __get_mdiv() 129 mdiv = val & IPROC_CLK_PLLARMCTL5_H_MDIV_MASK; in __get_mdiv() 130 if (mdiv == 0) in __get_mdiv() 131 mdiv = 256; in __get_mdiv() 135 mdiv = -EFAULT; in __get_mdiv() 138 return mdiv; in __get_mdiv() [all …]
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H A D | clk-nsp.c | 51 .mdiv = REG_VAL(0x18, 16, 8), 57 .mdiv = REG_VAL(0x18, 8, 8), 63 .mdiv = REG_VAL(0x18, 0, 8), 69 .mdiv = REG_VAL(0x1c, 16, 8), 75 .mdiv = REG_VAL(0x1c, 8, 8), 81 .mdiv = REG_VAL(0x1c, 0, 8), 108 .mdiv = REG_VAL(0x8, 24, 8), 114 .mdiv = REG_VAL(0x8, 16, 8), 120 .mdiv = REG_VAL(0x8, 8, 8),
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H A D | clk-iproc-pll.c | 617 unsigned int mdiv; in iproc_clk_recalc_rate() local 623 val = readl(pll->control_base + ctrl->mdiv.offset); in iproc_clk_recalc_rate() 624 mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width); in iproc_clk_recalc_rate() 625 if (mdiv == 0) in iproc_clk_recalc_rate() 626 mdiv = 256; in iproc_clk_recalc_rate() 629 rate = parent_rate / (mdiv * 2); in iproc_clk_recalc_rate() 631 rate = parent_rate / mdiv; in iproc_clk_recalc_rate() 677 val = readl(pll->control_base + ctrl->mdiv.offset); in iproc_clk_set_rate() 679 val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); in iproc_clk_set_rate() 681 val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); in iproc_clk_set_rate() [all …]
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H A D | clk-iproc.h | 187 struct iproc_clk_reg_op mdiv; member
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/linux/drivers/clk/samsung/ |
H A D | clk-pll.c | 153 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local 157 mdiv = (pll_con >> PLL2126_MDIV_SHIFT) & PLL2126_MDIV_MASK; in samsung_pll2126_recalc_rate() 161 fvco *= (mdiv + 8); in samsung_pll2126_recalc_rate() 186 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local 190 mdiv = (pll_con >> PLL3000_MDIV_SHIFT) & PLL3000_MDIV_MASK; in samsung_pll3000_recalc_rate() 194 fvco *= (2 * (mdiv + 8)); in samsung_pll3000_recalc_rate() 224 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() local 228 mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK; in samsung_pll35xx_recalc_rate() 232 fvco *= mdiv; in samsung_pll35xx_recalc_rate() 246 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change() [all …]
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/linux/drivers/clk/st/ |
H A D | clkgen-fsyn.c | 35 unsigned long mdiv; member 58 struct clkgen_field mdiv[QUADFS_MAX_CHAN]; member 102 .mdiv = { CLKGEN_FIELD(0x304, 0x1f, 15), 165 .mdiv = { CLKGEN_FIELD(0x2b4, 0x1f, 15), 554 CLKGEN_WRITE(fs, mdiv[fs->chan], fs->md); in quadfs_fsynth_program_rate() 639 res = (P20 * (32 + fs->mdiv) + 32 * fs->pe) * s * ns; in clk_fs660c32_dig_get_rate() 663 fs_tmp.mdiv = (unsigned long) m; in clk_fs660c32_get_pe() 673 fs->mdiv = m; in clk_fs660c32_get_pe() 719 fs_tmp.mdiv = fs->mdiv; in clk_fs660c32_dig_get_params() 752 params->mdiv = CLKGEN_READ(fs, mdiv[fs->chan]); in quadfs_fsynt_get_hw_value_for_recalc() [all …]
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H A D | clkgen-pll.c | 45 struct clkgen_field mdiv; member 219 unsigned long mdiv; member
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/linux/drivers/clk/socfpga/ |
H A D | clk-pll-s10.c | 65 unsigned long arefdiv, reg, mdiv; in agilex_clk_pll_recalc_rate() local 76 mdiv = reg & SOCFPGA_AGILEX_PLL_MDIV_MASK; in agilex_clk_pll_recalc_rate() 78 vco_freq = (unsigned long long)vco_freq * mdiv; in agilex_clk_pll_recalc_rate() 86 unsigned long mdiv; in clk_pll_recalc_rate() local 100 mdiv = (reg & SOCFPGA_PLL_MDIV_MASK) >> SOCFPGA_PLL_MDIV_SHIFT; in clk_pll_recalc_rate() 101 vco_freq = (unsigned long long)vco_freq * (mdiv + 6); in clk_pll_recalc_rate()
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/linux/drivers/gpu/drm/stm/ |
H A D | lvds.c | 388 static int pll_get_clkout_khz(int clkin_khz, int bdiv, int mdiv, int ndiv) in pll_get_clkout_khz() argument 396 return clkin_khz * mdiv / divisor; in pll_get_clkout_khz() 409 unsigned int *bdiv, unsigned int *mdiv, unsigned int *ndiv) in lvds_pll_get_params() argument 432 *mdiv = n; in lvds_pll_get_params() 447 unsigned int pll_in_khz, bdiv = 0, mdiv = 0, ndiv = 0; in lvds_pll_config() local 502 &bdiv, &mdiv, &ndiv); in lvds_pll_config() 507 lvds_write(lvds, phy->base + phy->ofs.PLLSDCR1, mdiv); in lvds_pll_config() 638 unsigned int pll_in_khz, bdiv, mdiv, ndiv; in lvds_pixel_clk_recalc_rate() local 658 mdiv = (unsigned int)lvds_read(lvds, in lvds_pixel_clk_recalc_rate() 664 if (val == 0 || mdiv == 0) { in lvds_pixel_clk_recalc_rate() [all …]
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
H A D | gk104.c | 35 u32 mdiv; member 320 info->mdiv |= 0x80000000; in calc_clk() 321 info->mdiv |= div1D; in calc_clk() 327 info->mdiv |= 0x80000000; in calc_clk() 328 info->mdiv |= div1P << 8; in calc_clk() 416 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f00, info->mdiv); in gk104_clk_prog_3() 418 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x0000003f, info->mdiv); in gk104_clk_prog_3()
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H A D | gf100.c | 35 u32 mdiv; member 307 info->mdiv |= 0x80000000; in calc_clk() 308 info->mdiv |= div1D; in calc_clk() 314 info->mdiv |= 0x80000000; in calc_clk() 315 info->mdiv |= div1P << 8; in calc_clk() 412 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f3f, info->mdiv); in gf100_clk_prog_4()
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H A D | base.c | 373 lo /= clock->mdiv; in nvkm_pstate_info() 374 hi /= clock->mdiv; in nvkm_pstate_info()
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/linux/sound/soc/codecs/ |
H A D | ak4375.c | 279 unsigned int mclk, plm, mdiv, div; in ak4375_dai_set_pll() local 327 mdiv = freq_out / mclk - 1; in ak4375_dai_set_pll() 332 mdiv = freq_out / mclk - 1; in ak4375_dai_set_pll() 337 mdiv = 4; in ak4375_dai_set_pll() 359 snd_soc_component_write(component, AK4375_14_DAC_CLK_DIVIDER, mdiv); in ak4375_dai_set_pll() 362 ak4375->rate, mclk, freq_in, freq_out, ak4375->pld, plm, mdiv, div); in ak4375_dai_set_pll()
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/linux/drivers/media/dvb-frontends/ |
H A D | horus3a.c | 172 u8 mdiv = 0; in horus3a_set_params() local 190 mdiv = 1; in horus3a_set_params() 193 mdiv = 0; in horus3a_set_params() 296 data[4] = (u8)(mdiv << 7); in horus3a_set_params()
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H A D | stb0899_drv.c | 559 u8 mdiv = 0; in stb0899_set_mclk() local 562 mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1; in stb0899_set_mclk() 563 dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv); in stb0899_set_mclk() 565 stb0899_write_reg(state, STB0899_NCOARSE, mdiv); in stb0899_set_mclk()
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/linux/drivers/phy/rockchip/ |
H A D | phy-rockchip-samsung-hdptx.c | 691 u32 mdiv, sdiv, n = 8; in rk_hdptx_phy_clk_pll_calc() local 705 mdiv = DIV_ROUND_UP(fvco, fref); in rk_hdptx_phy_clk_pll_calc() 706 if (mdiv < 20 || mdiv > 255) in rk_hdptx_phy_clk_pll_calc() 709 if (fref * mdiv - fvco) { in rk_hdptx_phy_clk_pll_calc() 711 if (sdc * n > fref * mdiv) in rk_hdptx_phy_clk_pll_calc() 717 rational_best_approximation(fref * mdiv - fvco, in rk_hdptx_phy_clk_pll_calc() 723 rational_best_approximation(sdc * n - fref * mdiv, in rk_hdptx_phy_clk_pll_calc() 737 cfg->pms_mdiv = mdiv; in rk_hdptx_phy_clk_pll_calc() 738 cfg->pms_mdiv_afc = mdiv; in rk_hdptx_phy_clk_pll_calc()
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
H A D | ctrl.c | 126 args->v0.min = lo / domain->mdiv; in nvkm_control_mthd_pstate_attr() 127 args->v0.max = hi / domain->mdiv; in nvkm_control_mthd_pstate_attr()
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/linux/drivers/clk/nxp/ |
H A D | clk-lpc18xx-cgu.c | 350 u32 ctrl, mdiv, msel, npdiv; in lpc18xx_pll0_recalc_rate() local 353 mdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV); in lpc18xx_pll0_recalc_rate() 364 msel = lpc18xx_pll0_mdec2msel(mdiv & LPC18XX_PLL0_MDIV_MDEC_MASK); in lpc18xx_pll0_recalc_rate()
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/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
H A D | clk.h | 79 int mdiv; member
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/linux/drivers/i2c/busses/ |
H A D | i2c-octeon-core.c | 682 unsigned int thp, mdiv_min, mdiv = 2, ndiv = 0, ds = 10; in octeon_i2c_set_clock() local 737 mdiv = mdiv_idx; in octeon_i2c_set_clock() 744 octeon_i2c_reg_write(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv); in octeon_i2c_set_clock()
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/linux/drivers/clk/imx/ |
H A D | clk.h | 60 unsigned int mdiv; member 266 .mdiv = (_m), \ 274 .mdiv = (_m), \
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/linux/sound/soc/sunxi/ |
H A D | sun4i-i2s.c | 317 const struct sun4i_i2s_clk_div *mdiv = ÷rs[i]; in sun4i_i2s_get_mclk_div() local 319 if (mdiv->div == div) in sun4i_i2s_get_mclk_div() 320 return mdiv->val; in sun4i_i2s_get_mclk_div()
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