| /linux/drivers/clk/hisilicon/ |
| H A D | clk-hi3620.c | 283 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_determine_rate() local
285 if ((req->rate <= 13000000) && (mclk->id == HI3620_MMC_CIUCLK1)) { in mmc_clk_determine_rate()
322 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_set_timing() local
359 val = readl_relaxed(mclk->clken_reg); in mmc_clk_set_timing()
360 val &= ~(1 << mclk->clken_bit); in mmc_clk_set_timing()
361 writel_relaxed(val, mclk->clken_reg); in mmc_clk_set_timing()
363 val = readl_relaxed(mclk->sam_reg); in mmc_clk_set_timing()
364 val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits); in mmc_clk_set_timing()
365 writel_relaxed(val, mclk->sam_reg); in mmc_clk_set_timing()
367 val = readl_relaxed(mclk->drv_reg); in mmc_clk_set_timing()
[all …]
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | btc_dpm.c | 1214 u32 *sclk, u32 *mclk) in btc_skip_blacklist_clocks() argument
1218 if ((sclk == NULL) || (mclk == NULL)) in btc_skip_blacklist_clocks()
1225 (btc_blacklist_clocks[i].mclk == *mclk)) in btc_skip_blacklist_clocks()
1234 btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk); in btc_skip_blacklist_clocks()
1244 if ((pl->mclk == 0) || (pl->sclk == 0)) in btc_adjust_clock_combinations()
1247 if (pl->mclk == pl->sclk) in btc_adjust_clock_combinations()
1250 if (pl->mclk > pl->sclk) { in btc_adjust_clock_combinations()
1251 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1254 (pl->mclk + in btc_adjust_clock_combinations()
1258 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
[all …]
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| H A D | rv730_dpm.c | 118 LPRV7XX_SMC_MCLK_VALUE mclk) in rv730_populate_mclk_value() argument
183 mclk->mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_mclk_value()
184 mclk->mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_mclk_value()
185 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock); in rv730_populate_mclk_value()
186 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_mclk_value()
187 mclk->mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_mclk_value()
188 mclk->mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_mclk_value()
189 mclk->mclk730.vMPLL_SS = cpu_to_be32(mpll_ss); in rv730_populate_mclk_value()
190 mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv730_populate_mclk_value()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
[all …]
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| H A D | rv740_dpm.c | 187 RV7XX_SMC_MCLK_VALUE *mclk) in rv740_populate_mclk_value() argument
274 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv740_populate_mclk_value()
275 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_mclk_value()
276 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_mclk_value()
277 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_mclk_value()
278 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_mclk_value()
279 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_mclk_value()
280 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv740_populate_mclk_value()
281 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1); in rv740_populate_mclk_value()
282 mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv740_populate_mclk_value()
[all …]
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| H A D | rv770_dpm.c | 389 RV7XX_SMC_MCLK_VALUE *mclk) in rv770_populate_mclk_value() argument
474 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv770_populate_mclk_value()
475 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv770_populate_mclk_value()
476 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv770_populate_mclk_value()
477 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv770_populate_mclk_value()
478 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_mclk_value()
479 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv770_populate_mclk_value()
480 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv770_populate_mclk_value()
593 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in rv770_populate_mvdd_value() argument
604 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
[all …]
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| H A D | cypress_dpm.c | 422 u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk) in cypress_get_strobe_mode_settings() argument
429 if (mclk <= pi->mclk_strobe_mode_threshold) in cypress_get_strobe_mode_settings()
431 result = cypress_get_mclk_frequency_ratio(rdev, mclk, strobe_mode); in cypress_get_strobe_mode_settings()
474 RV7XX_SMC_MCLK_VALUE *mclk, in cypress_populate_mclk_value() argument
600 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in cypress_populate_mclk_value()
601 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in cypress_populate_mclk_value()
602 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in cypress_populate_mclk_value()
603 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in cypress_populate_mclk_value()
604 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in cypress_populate_mclk_value()
605 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in cypress_populate_mclk_value()
[all …]
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| H A D | si_dpm.c | 2909 u32 mclk, sclk; in si_apply_state_adjust_rules() local
2973 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
2974 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
2998 if (ps->performance_levels[i].mclk > max_mclk_vddci) in si_apply_state_adjust_rules()
2999 ps->performance_levels[i].mclk = max_mclk_vddci; in si_apply_state_adjust_rules()
3002 if (ps->performance_levels[i].mclk > max_mclk_vddc) in si_apply_state_adjust_rules()
3003 ps->performance_levels[i].mclk = max_mclk_vddc; in si_apply_state_adjust_rules()
3006 if (ps->performance_levels[i].mclk > max_mclk) in si_apply_state_adjust_rules()
3007 ps->performance_levels[i].mclk = max_mclk; in si_apply_state_adjust_rules()
3018 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()
[all …]
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| /linux/sound/soc/codecs/ |
| H A D | wm8731.c | 229 u32 mclk; member
237 /* codec mclk clock divider coefficients */
302 static inline int get_coeff(int mclk, int rate) in get_coeff() argument
307 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) in get_coeff()
371 if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq)) in wm8731_set_dai_sysclk()
474 if (wm8731->mclk) { in wm8731_set_bias_level()
475 ret = clk_prepare_enable(wm8731->mclk); in wm8731_set_bias_level()
497 if (wm8731->mclk) in wm8731_set_bias_level()
[all...] |
| H A D | es8311.c | 31 struct clk *mclk; member
326 unsigned int mclk; member
337 * settings. Internal mclk dividers and multipliers are dynamically adjusted to
340 * All rates are supported when mclk/rate ratio is 32, 64, 128, 256, 384 or 512
341 * (upper limit due to max mclk freq of 49.2MHz).
371 * If mclk_freq is a valid multiple or factor of coeff mclk freq, return 0 and
386 if (coeff->mclk == mclk_freq) { in es8311_cmp_adj_mclk_coeff()
388 } else if (mclk_freq % coeff->mclk == 0) { in es8311_cmp_adj_mclk_coeff()
389 div = mclk_freq / coeff->mclk; in es8311_cmp_adj_mclk_coeff()
393 } else if (coeff->mclk in es8311_cmp_adj_mclk_coeff()
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| H A D | es8375.c | 28 struct clk *mclk; member
185 u32 mclk; member
266 static inline int get_coeff(u8 vddd, u8 dmic, int mclk, int rate) in get_coeff() argument
272 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) { in get_coeff()
455 ret = clk_prepare_enable(es8375->mclk); in es8375_set_bias_level()
466 clk_disable_unprepare(es8375->mclk); in es8375_set_bias_level()
666 es8375->mclk = devm_clk_get(dev, "mclk"); in es8375_read_device_properities()
667 if (IS_ERR(es8375->mclk)) in es8375_read_device_properities()
668 return dev_err_probe(dev, PTR_ERR(es8375->mclk), "unable to get mclk\n"); in es8375_read_device_properities()
670 if (!es8375->mclk) in es8375_read_device_properities()
[all …]
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| H A D | nau8325.c | 344 int mclk, int *n2_sel) in nau8325_clksrc_n2() argument
350 mclk_src = mclk >> mclk_n2_div[i].param; in nau8325_clksrc_n2()
389 int i, j, mclk, ratio; in nau8325_clksrc_choose() local
392 if (!nau8325->mclk || !nau8325->fs) in nau8325_clksrc_choose()
403 ratio = nau8325_clksrc_n2(nau8325, *srate_table, nau8325->mclk, n2_sel); in nau8325_clksrc_choose()
414 mclk = nau8325->mclk << mclk_n3_mult[j].param; in nau8325_clksrc_choose()
415 mclk = mclk / mclk_n1_div[i].param; in nau8325_clksrc_choose()
417 *srate_table, mclk, n2_sel); in nau8325_clksrc_choose()
419 (mclk_max < mclk || i > *n1_sel)) { in nau8325_clksrc_choose()
420 mclk_max = mclk; in nau8325_clksrc_choose()
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| H A D | tlv320aic23.c | 186 int mclk; member
241 static int find_rate(int mclk, u32 need_adc, u32 need_dac) in find_rate() argument
260 int base = mclk / bosr_usb_divisor_table[i]; in find_rate()
294 static void get_current_sample_rates(struct snd_soc_component *component, int mclk, in get_current_sample_rates() argument
299 int val = (mclk / bosr_usb_divisor_table[src & 3]); in get_current_sample_rates()
311 static int set_sample_rate_control(struct snd_soc_component *component, int mclk, in set_sample_rate_control() argument
315 int data = find_rate(mclk, sample_rate_adc, sample_rate_dac); in set_sample_rate_control()
325 get_current_sample_rates(component, mclk, &adc, &dac); in set_sample_rate_control()
354 ret = set_sample_rate_control(component, aic23->mclk, sample_rate_adc, in tlv320aic23_hw_params()
474 aic23->mclk in tlv320aic23_set_dai_sysclk()
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| H A D | ml26124.c | 35 u32 mclk; member
43 u32 mclk; member
313 static inline int get_coeff(int mclk, int rate) in get_coeff() argument
318 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) in get_coeff()
330 int i = get_coeff(priv->mclk, params_rate(hw_params)); in ml26124_hw_params()
339 switch (priv->mclk / params_rate(hw_params)) { in ml26124_hw_params()
453 priv->mclk = freq; in ml26124_set_dai_sysclk()
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| /linux/sound/soc/intel/boards/ |
| H A D | cht_bsw_rt5672.c | 35 struct clk *mclk; member
66 if (ctx->mclk) { in platform_clock_control()
67 ret = clk_prepare_enable(ctx->mclk); in platform_clock_control()
103 if (ctx->mclk) in platform_clock_control()
104 clk_disable_unprepare(ctx->mclk); in platform_clock_control()
243 if (ctx->mclk) { in cht_codec_init()
254 ret = clk_prepare_enable(ctx->mclk); in cht_codec_init()
256 clk_disable_unprepare(ctx->mclk); in cht_codec_init()
258 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); in cht_codec_init()
503 drv->mclk in snd_cht_mc_probe()
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| H A D | cht_bsw_max98090_ti.c | 36 struct clk *mclk; member
61 ret = clk_prepare_enable(ctx->mclk); in platform_clock_control()
68 clk_disable_unprepare(ctx->mclk); in platform_clock_control()
238 ret = clk_prepare_enable(ctx->mclk); in cht_codec_init()
240 clk_disable_unprepare(ctx->mclk); in cht_codec_init()
242 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); in cht_codec_init()
573 drv->mclk = devm_clk_get(dev, mclk_name); in snd_cht_mc_probe()
574 if (IS_ERR(drv->mclk)) { in snd_cht_mc_probe()
577 mclk_name, PTR_ERR(drv->mclk)); in snd_cht_mc_probe()
578 return PTR_ERR(drv->mclk); in snd_cht_mc_probe()
[all...] |
| /linux/sound/soc/cirrus/ |
| H A D | ep93xx-i2s.c | 74 struct clk *mclk; member
101 clk_prepare_enable(info->mclk); in ep93xx_i2s_enable()
148 clk_disable_unprepare(info->mclk); in ep93xx_i2s_disable()
325 div = clk_get_rate(info->mclk) / params_rate(params); in ep93xx_i2s_hw_params()
335 err = clk_set_rate(info->sclk, clk_get_rate(info->mclk) / sdiv); in ep93xx_i2s_hw_params()
356 return clk_set_rate(info->mclk, freq); in ep93xx_i2s_set_sysclk()
449 info->mclk = clk_get(&pdev->dev, "mclk"); in ep93xx_i2s_probe()
450 if (IS_ERR(info->mclk)) { in ep93xx_i2s_probe()
451 err = PTR_ERR(info->mclk); in ep93xx_i2s_probe()
485 clk_put(info->mclk); in ep93xx_i2s_probe()
[all …]
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| /linux/drivers/media/dvb-frontends/ |
| H A D | stv0900_sw.c | 42 max_carrier /= intp->mclk / 1000; in stv0900_check_signal_presence()
69 max_carrier /= intp->mclk / 1000; in stv0900_get_sw_loop_params()
75 freq_inc /= intp->mclk >> 10; in stv0900_get_sw_loop_params()
135 max_carrier /= intp->mclk / 1000; in stv0900_search_carr_sw_loop()
295 u32 mclk, in stv0900_get_symbol_rate() argument
310 intval1 = (mclk) >> 16; in stv0900_get_symbol_rate()
313 rem1 = (mclk) % 0x10000; in stv0900_get_symbol_rate()
323 u32 mclk, u32 srate, in stv0900_set_symbol_rate() argument
328 dprintk("%s: Mclk %d, SR %d, Dmd %d\n", __func__, mclk, in stv0900_set_symbol_rate()
333 symb /= (mclk >> 12); in stv0900_set_symbol_rate()
[all …]
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| H A D | stv6110.c | 28 u32 mclk; member
210 ((((priv->mclk / 1000000) - 16) & 0x1f) << 3); in stv6110_init()
239 freq = divider * (priv->mclk / 1000); in stv6110_get_frequency()
256 frequency, priv->mclk); in stv6110_set_frequency()
261 ((((priv->mclk / 1000000) - 16) & 0x1f) << 3); in stv6110_set_frequency()
290 p_calc = (priv->mclk / 100000); in stv6110_set_frequency()
295 p_calc_opt = (priv->mclk / 100000); in stv6110_set_frequency()
299 ref = priv->mclk / ((1 << (r_div_opt + 1)) * (1 << (p + 1))); in stv6110_set_frequency()
329 vco_freq = divider * ((priv->mclk / 1000) / ((1 << (r_div_opt + 1)))); in stv6110_set_frequency()
417 priv->mclk = config->mclk; in stv6110_attach()
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| H A D | m88rs2000.c | 104 u32 mclk; in m88rs2000_get_mclk() local
114 mclk = (u32)(reg * RS2000_FE_CRYSTAL_KHZ + 28 / 2) / 28; in m88rs2000_get_mclk()
116 return mclk; in m88rs2000_get_mclk()
122 u32 mclk; in m88rs2000_set_carrieroffset() local
127 mclk = m88rs2000_get_mclk(fe); in m88rs2000_set_carrieroffset()
128 if (!mclk) in m88rs2000_set_carrieroffset()
131 tmp = (offset * 4096 + (s32)mclk / 2) / (s32)mclk; in m88rs2000_set_carrieroffset()
152 u32 mclk; in m88rs2000_set_symbolrate() local
158 mclk = m88rs2000_get_mclk(fe); in m88rs2000_set_symbolrate()
159 if (!mclk) in m88rs2000_set_symbolrate()
[all …]
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| /linux/arch/powerpc/boot/dts/ |
| H A D | mpc5121.dtsi | 164 clock-names = "ipg", "ips", "sys", "ref", "mclk";
176 clock-names = "ipg", "ips", "sys", "ref", "mclk";
250 clock-names = "ipg", "ips", "sys", "ref", "mclk";
262 clock-names = "ipg", "ips", "sys", "ref", "mclk";
357 clock-names = "ipg", "mclk";
369 clock-names = "ipg", "mclk";
381 clock-names = "ipg", "mclk";
393 clock-names = "ipg", "mclk";
405 clock-names = "ipg", "mclk";
417 clock-names = "ipg", "mclk";
[all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1028a-kontron-sl28-var3-ads2.dts | 53 simple-audio-card,mclk-fs = <256>;
111 clocks = <&mclk>;
112 clock-names = "mclk";
113 assigned-clocks = <&mclk>;
132 mclk: clock-mclk@f130080 { label
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| /linux/drivers/iio/adc/ |
| H A D | ad7766.c | 38 struct clk *mclk; member
97 ret = clk_prepare_enable(ad7766->mclk); in ad7766_preenable()
121 clk_disable_unprepare(ad7766->mclk); in ad7766_postdisable()
143 *val = clk_get_rate(ad7766->mclk) / in ad7766_read_raw()
224 ad7766->mclk = devm_clk_get(&spi->dev, "mclk"); in ad7766_probe()
225 if (IS_ERR(ad7766->mclk)) in ad7766_probe()
226 return PTR_ERR(ad7766->mclk); in ad7766_probe()
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| /linux/sound/soc/fsl/ |
| H A D | fsl_mqs.c | 70 struct clk *mclk; member
113 mclk_rate = clk_get_rate(mqs_priv->mclk); in fsl_mqs_hw_params()
288 mqs_priv->mclk = devm_clk_get(&pdev->dev, "mclk"); in fsl_mqs_probe()
289 if (IS_ERR(mqs_priv->mclk)) { in fsl_mqs_probe()
291 PTR_ERR(mqs_priv->mclk)); in fsl_mqs_probe()
292 return PTR_ERR(mqs_priv->mclk); in fsl_mqs_probe()
322 ret = clk_prepare_enable(mqs_priv->mclk); in fsl_mqs_runtime_resume()
339 clk_disable_unprepare(mqs_priv->mclk); in fsl_mqs_runtime_suspend()
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| /linux/drivers/spi/ |
| H A D | spi-sun4i.c | 81 struct clk *mclk; member
273 mclk_rate = clk_get_rate(sspi->mclk); in sun4i_spi_transfer_one()
275 clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); in sun4i_spi_transfer_one()
276 mclk_rate = clk_get_rate(sspi->mclk); in sun4i_spi_transfer_one()
403 ret = clk_prepare_enable(sspi->mclk); in sun4i_spi_runtime_resume()
425 clk_disable_unprepare(sspi->mclk); in sun4i_spi_runtime_suspend()
485 sspi->mclk = devm_clk_get(&pdev->dev, "mod"); in sun4i_spi_probe()
486 if (IS_ERR(sspi->mclk)) { in sun4i_spi_probe()
488 ret = PTR_ERR(sspi->mclk); in sun4i_spi_probe()
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| /linux/sound/soc/stm/ |
| H A D | stm32_i2s.c | 467 struct stm32_i2smclk_data *mclk = to_mclk_data(hw); in stm32_i2smclk_determine_rate() local
468 struct stm32_i2s_data *i2s = mclk->i2s_data; in stm32_i2smclk_determine_rate()
475 mclk->freq = req->best_parent_rate / i2s->divider; in stm32_i2smclk_determine_rate()
477 req->rate = mclk->freq; in stm32_i2smclk_determine_rate()
485 struct stm32_i2smclk_data *mclk = to_mclk_data(hw); in stm32_i2smclk_recalc_rate() local
487 return mclk->freq; in stm32_i2smclk_recalc_rate()
493 struct stm32_i2smclk_data *mclk = to_mclk_data(hw); in stm32_i2smclk_set_rate() local
494 struct stm32_i2s_data *i2s = mclk->i2s_data; in stm32_i2smclk_set_rate()
505 mclk->freq = rate; in stm32_i2smclk_set_rate()
512 struct stm32_i2smclk_data *mclk = to_mclk_data(hw); in stm32_i2smclk_enable() local
[all …]
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