Searched refs:mc_arb_ramcfg (Results 1 – 9 of 9) sorted by relevance
1184 u32 mc_arb_ramcfg; in rv770_gpu_init() local1300 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in rv770_gpu_init()1356 if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) in rv770_gpu_init()1362 gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); in rv770_gpu_init()1363 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { in rv770_gpu_init()1368 ROW_TILING(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT)); in rv770_gpu_init()1370 SAMPLE_SPLIT(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT)); in rv770_gpu_init()
868 u32 mc_arb_ramcfg; in cayman_gpu_init() local994 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in cayman_gpu_init()996 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in cayman_gpu_init()1047 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in cayman_gpu_init()
3135 u32 mc_arb_ramcfg; in evergreen_gpu_init() local3403 mc_arb_ramcfg = RREG32(FUS_MC_ARB_RAMCFG); in evergreen_gpu_init()3405 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in evergreen_gpu_init()3434 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in evergreen_gpu_init()
3072 u32 mc_arb_ramcfg; in si_gpu_init() local3185 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in si_gpu_init()3189 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in si_gpu_init()3237 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in si_gpu_init()
3171 u32 mc_arb_ramcfg; in cik_gpu_init() local3265 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in cik_gpu_init()3269 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in cik_gpu_init()3318 ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; in cik_gpu_init()
4173 u32 mc_arb_ramcfg; in gfx_v7_0_gpu_early_init() local4250 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v7_0_gpu_early_init()4251 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v7_0_gpu_early_init()4253 adev->gfx.config.num_banks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v7_0_gpu_early_init()4255 adev->gfx.config.num_ranks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v7_0_gpu_early_init()4287 tmp = (mc_arb_ramcfg & MC_ARB_RAMCFG__NOOFCOLS_MASK) >> MC_ARB_RAMCFG__NOOFCOLS__SHIFT; in gfx_v7_0_gpu_early_init()
209 unsigned mc_arb_ramcfg; member
1652 u32 mc_arb_ramcfg; in gfx_v8_0_gpu_early_init() local1792 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v8_0_gpu_early_init()1793 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v8_0_gpu_early_init()1795 adev->gfx.config.num_banks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v8_0_gpu_early_init()1797 adev->gfx.config.num_ranks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v8_0_gpu_early_init()1829 tmp = REG_GET_FIELD(mc_arb_ramcfg, MC_ARB_RAMCFG, NOOFCOLS); in gfx_v8_0_gpu_early_init()
915 config[no_regs++] = adev->gfx.config.mc_arb_ramcfg; in amdgpu_debugfs_gca_config_read()