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Searched refs:max_linewidth (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c809 uint32_t max_linewidth; in dpu_plane_atomic_check() local
867 max_linewidth = pdpu->catalog->caps->max_linewidth; in dpu_plane_atomic_check()
873 if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) || in dpu_plane_atomic_check()
882 drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) { in dpu_plane_atomic_check()
884 DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); in dpu_plane_atomic_check()
888 if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) { in dpu_plane_atomic_check()
890 DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); in dpu_plane_atomic_check()
900 DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); in dpu_plane_atomic_check()
H A Ddpu_hw_catalog.h358 u32 max_linewidth; member
/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_6_5_qcm2290.h15 .max_linewidth = 2160,
H A Ddpu_6_3_sm6115.h15 .max_linewidth = 2160,
H A Ddpu_6_9_sm6375.h16 .max_linewidth = 2160,
H A Ddpu_6_2_sc7180.h15 .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
H A Ddpu_3_3_sdm630.h16 .max_linewidth = DEFAULT_DPU_LINE_WIDTH,
H A Ddpu_5_4_sm6125.h16 .max_linewidth = 2160,
H A Ddpu_6_4_sm6350.h17 .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
H A Ddpu_7_2_sc7280.h15 .max_linewidth = 2400,
H A Ddpu_3_2_sdm660.h16 .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
H A Ddpu_4_0_sdm845.h17 .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
H A Ddpu_3_0_msm8998.h17 .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
H A Ddpu_5_2_sm7150.h17 .max_linewidth = 2880,
H A Ddpu_9_0_sm8550.h17 .max_linewidth = 5120,
H A Ddpu_7_0_sm8350.h17 .max_linewidth = 4096,
H A Ddpu_6_0_sm8250.h17 .max_linewidth = 4096,
H A Ddpu_5_0_sm8150.h17 .max_linewidth = 4096,
H A Ddpu_10_0_sm8650.h17 .max_linewidth = 8192,
H A Ddpu_8_1_sm8450.h17 .max_linewidth = 5120,
H A Ddpu_5_1_sc8180x.h17 .max_linewidth = 4096,
H A Ddpu_8_0_sc8280xp.h17 .max_linewidth = 5120,
H A Ddpu_9_2_x1e80100.h16 .max_linewidth = 5120,