| /linux/drivers/clk/nuvoton/ |
| H A D | clk-ma35d1-divider.c | 91 u32 max_div, min_div; in ma35d1_reg_adc_clkdiv() local
100 max_div = clk_div_mask(width) + 1; in ma35d1_reg_adc_clkdiv()
103 table = devm_kcalloc(dev, max_div + 1, sizeof(*table), GFP_KERNEL); in ma35d1_reg_adc_clkdiv()
107 for (i = 0; i < max_div; i++) { in ma35d1_reg_adc_clkdiv()
111 table[max_div].val = 0; in ma35d1_reg_adc_clkdiv()
112 table[max_div].div = 0; in ma35d1_reg_adc_clkdiv()
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| /linux/drivers/clk/ti/ |
| H A D | divider.c | 333 int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div, in ti_clk_parse_divider_data() argument
343 divider->max = max_div; in ti_clk_parse_divider_data()
371 if (div_table[i] > max_div) in ti_clk_parse_divider_data()
372 max_div = div_table[i]; in ti_clk_parse_divider_data()
378 divider->max = max_div; in ti_clk_parse_divider_data()
440 u32 max_div = 0; in _populate_divider_min_max() local
449 if (of_property_read_u32(node, "ti,max-div", &max_div)) { in _populate_divider_min_max()
457 if (val > max_div) in _populate_divider_min_max()
458 max_div = val; in _populate_divider_min_max()
465 divider->max = max_div; in _populate_divider_min_max()
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| H A D | clock.h | 117 u16 max_div; member
163 int max_div; member
214 int ti_clk_parse_divider_data(int *div_table, int num_dividers, int max_div,
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| H A D | clk-54xx.c | 44 .max_div = 2,
370 .max_div = 2,
397 .max_div = 2,
413 .max_div = 2,
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| H A D | clk-7xx.c | 344 .max_div = 4,
361 .max_div = 4,
552 .max_div = 4,
569 .max_div = 4,
662 .max_div = 4,
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| H A D | clk-44xx.c | 50 .max_div = 2,
279 .max_div = 4,
365 .max_div = 4,
670 .max_div = 64,
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| H A D | clk-33xx.c | 162 .max_div = 64,
172 .max_div = 64,
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| H A D | clkctrl.c | 410 div_data->max_div, div_flags, in _ti_clkctrl_setup_div()
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| /linux/drivers/clk/qcom/ |
| H A D | clk-regmap-mux-div.c | 92 unsigned int i, div, max_div; in mux_div_determine_rate() local
100 max_div = BIT(md->hid_width) - 1; in mux_div_determine_rate()
101 for (div = 1; div < max_div; div++) { in mux_div_determine_rate()
129 u32 div, max_div, best_src = 0, best_div = 0; in __mux_div_set_rate_and_parent() local
137 max_div = BIT(md->hid_width) - 1; in __mux_div_set_rate_and_parent()
138 for (div = 1; div < max_div; div++) { in __mux_div_set_rate_and_parent()
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| /linux/drivers/clk/hisilicon/ |
| H A D | clkdivider-hi6220.c | 110 u32 max_div, min_div; in hi6220_register_clkdiv() local
119 max_div = div_mask(width) + 1; in hi6220_register_clkdiv()
122 table = kcalloc(max_div + 1, sizeof(*table), GFP_KERNEL); in hi6220_register_clkdiv()
128 for (i = 0; i < max_div; i++) { in hi6220_register_clkdiv()
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| /linux/drivers/clk/renesas/ |
| H A D | clk-div6.c | 110 unsigned int i, min_div, max_div, div; in cpg_div6_clock_determine_rate() local
123 max_div = req->min_rate ? min(prate / req->min_rate, 64UL) : 64; in cpg_div6_clock_determine_rate()
124 if (max_div < min_div) in cpg_div6_clock_determine_rate()
128 div = clamp(div, min_div, max_div); in cpg_div6_clock_determine_rate()
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| /linux/drivers/clk/zynqmp/ |
| H A D | divider.c | 46 u16 max_div; member
152 width = fls(divider->max_div); in zynqmp_clk_divider_determine_rate()
314 div->max_div = zynqmp_clk_get_max_divisor(clk_id, nodes->type); in zynqmp_clk_register_divider()
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| /linux/drivers/net/wireless/intel/iwlegacy/ |
| H A D | 3945-debug.c | 400 struct iwl39_stats_div *div, *accum_div, *delta_div, *max_div; in il3945_ucode_general_stats_read() local
427 max_div = &il->_3945.max_delta.general.div; in il3945_ucode_general_stats_read()
468 delta_div->tx_on_a, max_div->tx_on_a); in il3945_ucode_general_stats_read()
473 delta_div->tx_on_b, max_div->tx_on_b); in il3945_ucode_general_stats_read()
478 delta_div->exec_time, max_div->exec_time); in il3945_ucode_general_stats_read()
483 delta_div->probe_time, max_div->probe_time); in il3945_ucode_general_stats_read()
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| H A D | 4965-debug.c | 630 struct stats_div *div, *accum_div, *delta_div, *max_div; in il4965_ucode_general_stats_read() local
656 max_div = &il->_4965.max_delta.general.common.div; in il4965_ucode_general_stats_read()
700 delta_div->tx_on_a, max_div->tx_on_a); in il4965_ucode_general_stats_read()
704 delta_div->tx_on_b, max_div->tx_on_b); in il4965_ucode_general_stats_read()
708 delta_div->exec_time, max_div->exec_time); in il4965_ucode_general_stats_read()
712 delta_div->probe_time, max_div->probe_time); in il4965_ucode_general_stats_read()
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| /linux/drivers/mfd/ |
| H A D | sm501.c | 406 int max_div, in sm501_calc_clock() argument
418 for (divider = 1; divider <= max_div; divider += 2) { in sm501_calc_clock()
450 int max_div) in sm501_calc_pll() argument
465 if (sm501_calc_clock(freq, clock, max_div, in sm501_calc_pll()
488 int max_div) in sm501_select_clock() argument
495 sm501_calc_clock(freq, clock, max_div, mclk, &best_diff); in sm501_select_clock()
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| /linux/drivers/clk/at91/ |
| H A D | clk-master.c | 168 unsigned int max_div = 0, div_index = 0, max_div_index = 0; in clk_master_div_set() local
179 if (max_div < characteristics->divisors[i]) { in clk_master_div_set()
180 max_div = characteristics->divisors[i]; in clk_master_div_set()
185 if (div > max_div) in clk_master_div_set()
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| /linux/drivers/spi/ |
| H A D | spi-rspi.c | 247 u16 max_div; member
1182 .max_div = 4096,
1192 .max_div = 4096,
1204 .max_div = 4080,
1338 ctlr->min_speed_hz = DIV_ROUND_UP(clksrc, ops->max_div); in rspi_probe()
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| H A D | spi-stm32.c | 558 u32 min_div, u32 max_div) in stm32_spi_prepare_mbr() argument
572 if ((div < min_div) || (div > max_div)) in stm32_spi_prepare_mbr()
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| /linux/drivers/tty/serial/ |
| H A D | esp32_uart.c | 398 u32 max_div = port_variant(port)->clkdiv_mask; in esp32_uart_set_termios() local
403 max_div *= FIELD_MAX(ESP32S3_UART_SCLK_DIV_NUM); in esp32_uart_set_termios()
406 port->uartclk / max_div, in esp32_uart_set_termios()
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| /linux/drivers/gpu/drm/vc4/ |
| H A D | vc4_hdmi_phy.c | 611 unsigned int max_div; in vc6_phy_get_vco_freq() local
621 max_div = div; in vc6_phy_get_vco_freq()
623 div = min_div + (max_div - min_div) / 2; in vc6_phy_get_vco_freq()
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| /linux/drivers/clk/starfive/ |
| H A D | clk-starfive-jh7100.c | 347 clk->max_div = max & JH71X0_CLK_DIV_MASK; in clk_starfive_jh7100_probe()
|