Searched refs:max_banks (Results 1 – 3 of 3) sorted by relevance
42 u8 max_banks; member159 int max_banks = piommu->max_banks; in get_next_avail_iommu_bnk_cntr() local166 for (bank = 0; bank < max_banks; bank++) { in get_next_avail_iommu_bnk_cntr()190 int max_banks, max_cntrs; in clear_avail_iommu_bnk_cntr() local193 max_banks = perf_iommu->max_banks; in clear_avail_iommu_bnk_cntr()196 if ((bank > max_banks) || (cntr > max_cntrs)) in clear_avail_iommu_bnk_cntr()433 perf_iommu->max_banks = amd_iommu_pc_get_max_banks(idx); in init_one_iommu()437 !perf_iommu->max_banks || in init_one_iommu()448 idx, perf_iommu->max_banks, perf_iommu->max_counters); in init_one_iommu()
497 u8 max_banks; member951 cdns_ctrl->caps2.max_banks = 1 << FIELD_GET(CTRL_FEATURES_N_BANKS, reg); in cadence_nand_get_caps()3030 if (cs >= cdns_ctrl->caps2.max_banks) { in cadence_nand_chip_init()3033 cs, cdns_ctrl->caps2.max_banks); in cadence_nand_chip_init()3096 int max_cs = cdns_ctrl->caps2.max_banks; in cadence_nand_chips_init()
2080 iommu->max_banks = (u8) ((val >> 12) & 0x3f); in init_iommu_perf_ctr()3898 return iommu->max_banks; in amd_iommu_pc_get_max_banks()3935 max_offset_lim = (u32)(((0x40 | iommu->max_banks) << 12) | in iommu_pc_get_set_reg()