Searched refs:max_backends_per_se (Results 1 – 11 of 11) sorted by relevance
884 rdev->config.cayman.max_backends_per_se = 4; in cayman_gpu_init()922 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()936 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()950 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()957 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()1078 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()1082 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()1112 if ((rdev->config.cayman.max_backends_per_se == 1) && in cayman_gpu_init()1124 rdev->config.cayman.max_backends_per_se * in cayman_gpu_init()
350 *value = rdev->config.cik.max_backends_per_se * in radeon_info_ioctl()353 *value = rdev->config.si.max_backends_per_se * in radeon_info_ioctl()356 *value = rdev->config.cayman.max_backends_per_se * in radeon_info_ioctl()
1338 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se/ in gfx_v6_0_get_rb_active_bitmap()1472 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v6_0_setup_rb()1491 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v6_0_setup_rb()1658 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()1675 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()1692 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()1709 adev->gfx.config.max_backends_per_se = 2; in gfx_v6_0_constants_init()1726 adev->gfx.config.max_backends_per_se = 1; in gfx_v6_0_constants_init()
1748 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()1792 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
963 dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
1367 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v12_1_get_rb_active_bitmap()1392 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v12_1_setup_rb()
1725 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v12_0_get_rb_active_bitmap()1749 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v12_0_setup_rb()
2036 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()2060 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v11_0_setup_rb()
2535 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v9_0_get_rb_active_bitmap()2546 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v9_0_setup_rb()
1850 adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); in amdgpu_device_parse_gpu_info_fw()
5656 UCHAR max_backends_per_se; member5669 UCHAR max_backends_per_se; member