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Searched refs:link_status (Results 1 – 25 of 136) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c402 const u8 link_status[DP_LINK_STATUS_SIZE], in intel_dp_get_lane_adjust_tx_ffe_preset()
409 tx_ffe = drm_dp_get_adjust_tx_ffe_preset(link_status, lane); in intel_dp_get_lane_adjust_tx_ffe_preset()
412 tx_ffe = max(tx_ffe, drm_dp_get_adjust_tx_ffe_preset(link_status, lane)); in intel_dp_get_lane_adjust_tx_ffe_preset()
422 const u8 link_status[DP_LINK_STATUS_SIZE], in intel_dp_get_lane_adjust_vswing_preemph()
433 v = drm_dp_get_adjust_request_voltage(link_status, lane); in intel_dp_get_lane_adjust_vswing_preemph()
434 p = drm_dp_get_adjust_request_pre_emphasis(link_status, lane); in intel_dp_get_lane_adjust_vswing_preemph()
437 v = max(v, drm_dp_get_adjust_request_voltage(link_status, lane)); in intel_dp_get_lane_adjust_vswing_preemph()
438 p = max(p, drm_dp_get_adjust_request_pre_emphasis(link_status, lane)); in intel_dp_get_lane_adjust_vswing_preemph()
458 const u8 link_status[DP_LINK_STATUS_SIZE], in intel_dp_get_lane_adjust_train()
463 dp_phy, link_status, lane); in intel_dp_get_lane_adjust_train()
[all …]
H A Dintel_dp_link_training.h28 const u8 link_status[DP_LINK_STATUS_SIZE]);
44 const u8 link_status[DP_LINK_STATUS_SIZE]);
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c203 static void amdgpu_atombios_dp_get_adjust_train(const u8 link_status[DP_LINK_STATUS_SIZE], in amdgpu_atombios_dp_get_adjust_train()
212 u8 this_v = drm_dp_get_adjust_request_voltage(link_status, lane); in amdgpu_atombios_dp_get_adjust_train()
213 u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, lane); in amdgpu_atombios_dp_get_adjust_train()
458 u8 link_status[DP_LINK_STATUS_SIZE]; in amdgpu_atombios_dp_needs_link_train() local
461 if (drm_dp_dpcd_read_link_status(&amdgpu_connector->ddc_bus->aux, link_status) in amdgpu_atombios_dp_needs_link_train()
464 if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) in amdgpu_atombios_dp_needs_link_train()
497 u8 link_status[DP_LINK_STATUS_SIZE]; member
619 dp_info->link_status) <= 0) { in amdgpu_atombios_dp_link_train_cr()
624 if (drm_dp_clock_recovery_ok(dp_info->link_status, dp_info->dp_lane_count)) { in amdgpu_atombios_dp_link_train_cr()
650 amdgpu_atombios_dp_get_adjust_train(dp_info->link_status, dp_info->dp_lane_count, in amdgpu_atombios_dp_link_train_cr()
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/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c268 uint8_t link_status[DP_LINK_STATUS_SIZE]; member
1233 intel_dp->link_status, in cdv_intel_dp_get_link_status()
1238 cdv_intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_dp_link_status()
1241 return link_status[r - DP_LANE0_1_STATUS]; in cdv_intel_dp_link_status()
1245 cdv_intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_get_adjust_request_voltage()
1252 uint8_t l = cdv_intel_dp_link_status(link_status, i); in cdv_intel_get_adjust_request_voltage()
1258 cdv_intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE], in cdv_intel_get_adjust_request_pre_emphasis()
1265 uint8_t l = cdv_intel_dp_link_status(link_status, i); in cdv_intel_get_adjust_request_pre_emphasis()
1281 uint8_t this_v = cdv_intel_get_adjust_request_voltage(intel_dp->link_status, lane); in cdv_intel_get_adjust_train()
1282 uint8_t this_p = cdv_intel_get_adjust_request_pre_emphasis(intel_dp->link_status, lane); in cdv_intel_get_adjust_train()
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/linux/include/drm/display/
H A Ddrm_dp_helper.h36 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
38 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
40 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
42 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
44 u8 drm_dp_get_adjust_tx_ffe_preset(const u8 link_status[DP_LINK_STATUS_SIZE],
61 bool drm_dp_128b132b_lane_channel_eq_done(const u8 link_status[DP_LINK_STATUS_SIZE],
63 bool drm_dp_128b132b_lane_symbol_locked(const u8 link_status[DP_LINK_STATUS_SIZE],
65 bool drm_dp_128b132b_eq_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE]);
66 bool drm_dp_128b132b_cds_interlane_align_done(const u8 link_status[DP_LINK_STATUS_SIZE]);
67 bool drm_dp_128b132b_link_training_failed(const u8 link_status[DP_LINK_STATUS_SIZE]);
[all …]
/linux/drivers/gpu/drm/radeon/
H A Datombios_dp.c252 static void dp_get_adjust_train(const u8 link_status[DP_LINK_STATUS_SIZE], in dp_get_adjust_train()
261 u8 this_v = drm_dp_get_adjust_request_voltage(link_status, lane); in dp_get_adjust_train()
262 u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, lane); in dp_get_adjust_train()
501 u8 link_status[DP_LINK_STATUS_SIZE]; in radeon_dp_needs_link_train() local
504 if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux, link_status) in radeon_dp_needs_link_train()
507 if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count)) in radeon_dp_needs_link_train()
542 u8 link_status[DP_LINK_STATUS_SIZE]; member
681 dp_info->link_status) <= 0) { in radeon_dp_link_train_cr()
686 if (drm_dp_clock_recovery_ok(dp_info->link_status, dp_info->dp_lane_count)) { in radeon_dp_link_train_cr()
712 dp_get_adjust_train(dp_info->link_status, dp_info->dp_lane_count, dp_info->train_set); in radeon_dp_link_train_cr()
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/linux/drivers/pci/pcie/
H A Dbwctrl.c207 u16 link_status; in pcie_bwnotif_enable() local
211 ret = pcie_capability_read_word(port, PCI_EXP_LNKSTA, &link_status); in pcie_bwnotif_enable()
212 if (ret == PCIBIOS_SUCCESSFUL && link_status & PCI_EXP_LNKSTA_LBMS) in pcie_bwnotif_enable()
238 u16 link_status, events; in pcie_bwnotif_irq() local
241 ret = pcie_capability_read_word(port, PCI_EXP_LNKSTA, &link_status); in pcie_bwnotif_irq()
245 events = link_status & (PCI_EXP_LNKSTA_LBMS | PCI_EXP_LNKSTA_LABS); in pcie_bwnotif_irq()
/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
H A Dhw_atl2_utils_fw.c287 struct link_status_s link_status; in aq_a2_fw_update_link_status() local
289 hw_atl2_shared_buffer_read(self, link_status, link_status); in aq_a2_fw_update_link_status()
291 switch (link_status.link_rate) { in aq_a2_fw_update_link_status()
313 self->aq_link_status.full_duplex = link_status.duplex; in aq_a2_fw_update_link_status()
528 struct link_status_s link_status; in aq_a2_fw_get_flow_control() local
530 hw_atl2_shared_buffer_read(self, link_status, link_status); in aq_a2_fw_get_flow_control()
532 *fcmode = ((link_status.pause_rx) ? AQ_NIC_FC_RX : 0) | in aq_a2_fw_get_flow_control()
533 ((link_status.pause_tx) ? AQ_NIC_FC_TX : 0); in aq_a2_fw_get_flow_control()
/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c496 u8 link_status[DP_LINK_STATUS_SIZE]) in cdns_mhdp_adjust_lt()
536 ret = cdns_mhdp_mailbox_recv_data(mhdp, link_status, in cdns_mhdp_adjust_lt()
929 u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_get_adjust_train()
943 adjust = drm_dp_get_adjust_request_voltage(link_status, i); in cdns_mhdp_get_adjust_train()
946 adjust = drm_dp_get_adjust_request_pre_emphasis(link_status, i); in cdns_mhdp_get_adjust_train()
973 void cdns_mhdp_set_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_set_adjust_request_voltage()
981 link_status[idx] &= ~(DP_ADJUST_VOLTAGE_SWING_LANE0_MASK << s); in cdns_mhdp_set_adjust_request_voltage()
982 link_status[idx] |= volt << s; in cdns_mhdp_set_adjust_request_voltage()
986 void cdns_mhdp_set_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], in cdns_mhdp_set_adjust_request_pre_emphasis()
994 link_status[idx] &= ~(DP_ADJUST_PRE_EMPHASIS_LANE0_MASK << s); in cdns_mhdp_set_adjust_request_pre_emphasis()
[all …]
/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c75 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) in dp_link_status()
77 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
80 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], in dp_get_lane_status()
85 u8 l = dp_link_status(link_status, i); in dp_get_lane_status()
90 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_channel_eq_ok()
97 lane_align = dp_link_status(link_status, in drm_dp_channel_eq_ok()
102 lane_status = dp_get_lane_status(link_status, lane); in drm_dp_channel_eq_ok()
110 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_clock_recovery_ok()
117 lane_status = dp_get_lane_status(link_status, lane); in drm_dp_clock_recovery_ok()
125 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], in drm_dp_get_adjust_request_voltage()
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/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_utils_fw2x.c249 struct aq_hw_link_status_s *link_status = &self->aq_link_status; in aq_fw2x_update_link_status() local
260 link_status->mbps = 10000; in aq_fw2x_update_link_status()
262 link_status->mbps = 5000; in aq_fw2x_update_link_status()
264 link_status->mbps = 2500; in aq_fw2x_update_link_status()
266 link_status->mbps = 1000; in aq_fw2x_update_link_status()
268 link_status->mbps = 100; in aq_fw2x_update_link_status()
270 link_status->mbps = 10000; in aq_fw2x_update_link_status()
272 link_status->mbps = 0; in aq_fw2x_update_link_status()
274 link_status->full_duplex = true; in aq_fw2x_update_link_status()
H A Dhw_atl_utils.c701 struct aq_hw_link_status_s *link_status = &self->aq_link_status; in hw_atl_utils_mpi_get_link_status() local
709 link_status->mbps = 0U; in hw_atl_utils_mpi_get_link_status()
713 link_status->mbps = 10000U; in hw_atl_utils_mpi_get_link_status()
718 link_status->mbps = 5000U; in hw_atl_utils_mpi_get_link_status()
722 link_status->mbps = 2500U; in hw_atl_utils_mpi_get_link_status()
726 link_status->mbps = 1000U; in hw_atl_utils_mpi_get_link_status()
730 link_status->mbps = 100U; in hw_atl_utils_mpi_get_link_status()
737 link_status->full_duplex = true; in hw_atl_utils_mpi_get_link_status()
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c295 static unsigned char analogix_dp_get_lane_status(u8 link_status[2], int lane) in analogix_dp_get_lane_status()
298 u8 link_value = link_status[lane >> 1]; in analogix_dp_get_lane_status()
303 static int analogix_dp_clock_recovery_ok(u8 link_status[2], int lane_count) in analogix_dp_clock_recovery_ok()
309 lane_status = analogix_dp_get_lane_status(link_status, lane); in analogix_dp_clock_recovery_ok()
316 static int analogix_dp_channel_eq_ok(u8 link_status[2], u8 link_align, in analogix_dp_channel_eq_ok()
326 lane_status = analogix_dp_get_lane_status(link_status, lane); in analogix_dp_channel_eq_ok()
390 u8 link_status[2], adjust_request[2]; in analogix_dp_process_clock_recovery() local
396 retval = drm_dp_dpcd_read(&dp->aux, DP_LANE0_1_STATUS, link_status, 2); in analogix_dp_process_clock_recovery()
400 if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) { in analogix_dp_process_clock_recovery()
456 u8 link_align, link_status[2], adjust_request[2]; in analogix_dp_process_equalizer_training() local
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c248 u32 link_status, cfg_idx, lfa_mask, cfg_size; in bnx2x_check_lfa() local
269 link_status = REG_RD(bp, params->shmem_base + in bnx2x_check_lfa()
271 port_mb[params->port].link_status)); in bnx2x_check_lfa()
272 if (!(link_status & LINK_STATUS_LINK_UP)) in bnx2x_check_lfa()
2099 static void bnx2x_update_mng(struct link_params *params, u32 link_status) in bnx2x_update_mng() argument
2105 port_mb[params->port].link_status), link_status); in bnx2x_update_mng()
2227 vars->link_status |= LINK_STATUS_PFC_ENABLED; in bnx2x_update_pfc()
2229 vars->link_status &= ~LINK_STATUS_PFC_ENABLED; in bnx2x_update_pfc()
2231 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_pfc()
3450 vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED; in set_phy_vars()
[all …]
/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_mac.c74 u32 link_status = 0; in hns_mac_link_anti_shake() local
78 return link_status; in hns_mac_link_anti_shake()
82 mac_ctrl_drv->get_link_status(mac_ctrl_drv, &link_status); in hns_mac_link_anti_shake()
83 if (!link_status) in hns_mac_link_anti_shake()
87 return link_status; in hns_mac_link_anti_shake()
90 void hns_mac_get_link_status(struct hns_mac_cb *mac_cb, u32 *link_status) in hns_mac_get_link_status() argument
98 mac_ctrl_drv->get_link_status(mac_ctrl_drv, link_status); in hns_mac_get_link_status()
100 *link_status = 0; in hns_mac_get_link_status()
106 *link_status = *link_status && sfp_prsnt; in hns_mac_get_link_status()
113 if (*link_status && !mac_cb->link) in hns_mac_get_link_status()
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/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_sriov.c53 u8 link_status) in hinic_notify_vf_link_status() argument
61 link.link = link_status; in hinic_notify_vf_link_status()
77 u8 link_status) in hinic_notify_all_vfs_link_changed() argument
82 nic_io->link_status = link_status; in hinic_notify_all_vfs_link_changed()
85 hinic_notify_vf_link_status(hwdev, i, link_status); in hinic_notify_all_vfs_link_changed()
425 get_link->state = nic_io->link_status; in hinic_get_vf_link_status_msg_handler()
984 u8 link_status = 0; in hinic_set_vf_link_state() local
989 vf_infos[HW_VF_ID_TO_OS(vf_id)].link_up = nic_io->link_status ? in hinic_set_vf_link_state()
991 link_status = nic_io->link_status; in hinic_set_vf_link_state()
996 link_status = HINIC_LINK_UP; in hinic_set_vf_link_state()
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/linux/drivers/scsi/snic/
H A Dsnic_attrs.c45 snic->link_status = svnic_dev_link_status(snic->vdev); in snic_show_link_state()
48 (snic->link_status) ? "Link Up" : "Link Down"); in snic_show_link_state()
H A Dsnic_ctl.c31 snic->link_status = svnic_dev_link_status(snic->vdev); in snic_handle_link()
34 ((snic->link_status) ? "Up" : "Down")); in snic_handle_link()
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_ctrl.c1103 u8 *link_status) in msm_dp_ctrl_read_link_status() argument
1107 len = drm_dp_dpcd_read_link_status(ctrl->aux, link_status); in msm_dp_ctrl_read_link_status()
1120 u8 link_status[DP_LINK_STATUS_SIZE]; in msm_dp_ctrl_link_train_1() local
1142 ret = msm_dp_ctrl_read_link_status(ctrl, link_status); in msm_dp_ctrl_link_train_1()
1146 if (drm_dp_clock_recovery_ok(link_status, in msm_dp_ctrl_link_train_1()
1162 msm_dp_link_adjust_levels(ctrl->link, link_status); in msm_dp_ctrl_link_train_1()
1228 u8 link_status[DP_LINK_STATUS_SIZE]; in msm_dp_ctrl_link_train_2() local
1254 ret = msm_dp_ctrl_read_link_status(ctrl, link_status); in msm_dp_ctrl_link_train_2()
1258 if (drm_dp_channel_eq_ok(link_status, in msm_dp_ctrl_link_train_2()
1263 msm_dp_link_adjust_levels(ctrl->link, link_status); in msm_dp_ctrl_link_train_2()
[all …]
/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_mbx.c305 u16 link_status, state; in hclgevf_mbx_async_handler() local
330 link_status = le16_to_cpu(link_info->link_status); in hclgevf_mbx_async_handler()
337 hclgevf_update_link_status(hdev, link_status); in hclgevf_mbx_async_handler()
/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_common.c15 u16 link_cap, link_status, device_cap, device_control; in fm10k_get_bus_info_generic() local
72 link_status = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_LINK_STATUS); in fm10k_get_bus_info_generic()
74 switch (link_status & FM10K_PCIE_LINK_WIDTH) { in fm10k_get_bus_info_generic()
92 switch (link_status & FM10K_PCIE_LINK_SPEED) { in fm10k_get_bus_info_generic()
/linux/drivers/scsi/csiostor/
H A Dcsio_mb.c840 uint8_t cos, bool link_status, uint32_t fcfi, in csio_write_fcoe_link_cond_init_mb() argument
856 cmdp->lstatus = link_status; in csio_write_fcoe_link_cond_init_mb()
1410 uint32_t link_status; in csio_mb_fwevt_handler() local
1429 link_status = ntohl(pcmd->u.info.lstatus_to_modtype); in csio_mb_fwevt_handler()
1430 mod_type = FW_PORT_CMD_MODTYPE_G(link_status); in csio_mb_fwevt_handler()
1431 linkattr = lstatus_to_fwcap(link_status); in csio_mb_fwevt_handler()
1433 hw->pport[port_id].link_status = in csio_mb_fwevt_handler()
1434 FW_PORT_CMD_LSTATUS_G(link_status); in csio_mb_fwevt_handler()
1436 link_status = in csio_mb_fwevt_handler()
1438 mod_type = FW_PORT_CMD_MODTYPE32_G(link_status); in csio_mb_fwevt_handler()
[all …]
/linux/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_xgmac.c479 u32 link_status, poll_interval; in xgene_enet_link_state() local
481 link_status = xgene_enet_link_status(pdata); in xgene_enet_link_state()
482 if (pdata->sfp_gpio_en && link_status && in xgene_enet_link_state()
485 link_status = 0; in xgene_enet_link_state()
487 if (link_status) { in xgene_enet_link_state()
/linux/drivers/scsi/fnic/
H A Dfnic_fcs.c72 if (!fnic->link_status) in fnic_get_host_port_state()
192 fnic->link_status, fnic->iport.state); in fnic_handle_link()
197 old_link_status = fnic->link_status; in fnic_handle_link()
198 fnic->link_status = vnic_dev_link_status(fnic->vdev); in fnic_handle_link()
227 (fnic->link_status != old_link_status)) { in fnic_handle_link()
230 old_link_status, (int) fnic->link_status); in fnic_handle_link()
236 if (old_link_status == fnic->link_status) { in fnic_handle_link()
237 if (!fnic->link_status) { in fnic_handle_link()
260 } else if (fnic->link_status) { in fnic_handle_link()
/linux/drivers/gpu/drm/bridge/
H A Dite-it6505.c1911 u8 link_status[DP_LINK_STATUS_SIZE] = { 0 }; in it6505_step_cr_train() local
1928 drm_dp_dpcd_read_link_status(&it6505->aux, link_status); in it6505_step_cr_train()
1930 if (drm_dp_clock_recovery_ok(link_status, it6505->lane_count)) { in it6505_step_cr_train()
1943 drm_dp_get_adjust_request_voltage(link_status, in it6505_step_cr_train()
1947 drm_dp_get_adjust_request_pre_emphasis(link_status, in it6505_step_cr_train()
1984 u8 loop_count = 0, i, link_status[DP_LINK_STATUS_SIZE] = { 0 }; in it6505_step_eq_train() local
2000 drm_dp_dpcd_read_link_status(&it6505->aux, link_status); in it6505_step_eq_train()
2002 if (!drm_dp_clock_recovery_ok(link_status, it6505->lane_count)) in it6505_step_eq_train()
2005 if (drm_dp_channel_eq_ok(link_status, it6505->lane_count)) { in it6505_step_eq_train()
2016 drm_dp_get_adjust_request_voltage(link_status, in it6505_step_eq_train()
[all …]

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