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Searched refs:link_rate (Results 1 – 25 of 38) sorted by relevance

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/linux/drivers/gpu/drm/tests/
H A Ddrm_dp_mst_helper_test.c72 int link_rate; member
93 .link_rate = 2000000,
98 .link_rate = 2000000,
103 .link_rate = 2000000,
108 .link_rate = 1350000,
113 .link_rate = 1350000,
118 .link_rate = 1350000,
123 .link_rate = 1000000,
128 .link_rate = 1000000,
133 .link_rate = 1000000,
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-edp.c371 if (dp_opts->link_rate <= 2700) { in qcom_edp_set_voltages()
424 switch (dp_opts->link_rate) { in qcom_edp_set_vco_div()
498 switch (dp_opts->link_rate) { in qcom_edp_com_configure_ssc_v4()
536 switch (dp_opts->link_rate) { in qcom_edp_com_configure_pll_v4()
619 else if (dp_opts->link_rate <= 2700) in qcom_edp_ldo_config_v3()
637 else if (dp_opts->link_rate <= 2700) in qcom_edp_ldo_config_v4()
748 switch (dp_opts->link_rate) { in qcom_edp_com_configure_ssc_v6()
788 switch (dp_opts->link_rate) { in qcom_edp_com_configure_pll_v6()
882 else if (dp_opts->link_rate <= 2700) in qcom_edp_ldo_config_v6()
917 switch (dp_opts->link_rate) { in qcom_edp_com_configure_ssc_v8()
[all …]
H A Dphy-qcom-qmp-usbc.c886 switch (dp_opts->link_rate) { in qmp_usbc_configure_dp_clocks()
900 dev_err(qmp->dev, "link rate:%d not supported\n", dp_opts->link_rate); in qmp_usbc_configure_dp_clocks()
905 clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); in qmp_usbc_configure_dp_clocks()
923 if (dp_opts->link_rate >= 2700) { in qcs615_qmp_configure_dp_tx()
1275 switch (dp_opts->link_rate) { in qmp_usbc_dp_serdes_init()
1631 switch (dp_opts->link_rate) { in qmp_dp_pixel_clk_recalc_rate()
1668 switch (dp_opts->link_rate) { in qmp_dp_link_clk_recalc_rate()
1672 return dp_opts->link_rate * 100000; in qmp_dp_link_clk_recalc_rate()
H A Dphy-qcom-qmp-combo.c3406 switch (dp_opts->link_rate) { in qmp_combo_dp_serdes_init()
3489 if (dp_opts->link_rate <= 2700) { in qmp_combo_configure_dp_swing()
3566 switch (dp_opts->link_rate) { in qmp_v3_configure_dp_clocks()
3589 clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); in qmp_v3_configure_dp_clocks()
3740 switch (dp_opts->link_rate) { in qmp_v8_configure_dp_clocks()
3779 clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); in qmp_v8_configure_dp_clocks()
4620 switch (dp_opts->link_rate) { in qmp_dp_pixel_clk_recalc_rate()
4660 switch (dp_opts->link_rate) { in qmp_dp_link_clk_recalc_rate()
4665 return dp_opts->link_rate * 100000; in qmp_dp_link_clk_recalc_rate()
/linux/sound/x86/
H A Dintel_hdmi_audio.c634 static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate) in had_calculate_maud_value() argument
639 if (link_rate == DP_2_7_GHZ) { in had_calculate_maud_value()
673 } else if (link_rate == DP_1_62_GHZ) { in had_calculate_maud_value()
724 static void had_prog_cts(u32 aud_samp_freq, u32 tmds, u32 link_rate, in had_prog_cts() argument
732 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate); in had_prog_cts()
1174 u32 link_rate = 0; in had_pcm_prepare() local
1200 link_rate = intelhaddata->link_rate; in had_pcm_prepare()
1202 had_prog_cts(substream->runtime->rate, disp_samp_freq, link_rate, in had_pcm_prepare()
1264 u32 link_rate = 0; in had_process_mode_change() local
1284 link_rate = intelhaddata->link_rate; in had_process_mode_change()
[all …]
H A Dintel_hdmi_audio.h93 int link_rate;
113 int link_rate; global() member
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_resource.c95 link->verified_link_cap.link_rate = LINK_RATE_HIGH3; in link_restore_res_map()
109 link->verified_link_cap.link_rate = LINK_RATE_HIGH3; in link_restore_res_map()
H A Dlink_detection.c601 link->cur_link_settings.link_rate = in read_current_link_settings_on_detect()
611 link->cur_link_settings.link_rate = link_bw_set; in read_current_link_settings_on_detect()
1251 link->reported_link_cap.link_rate > LINK_RATE_HIGH3) in detect_link_and_local_sink()
1252 link->reported_link_cap.link_rate = LINK_RATE_HIGH3; in detect_link_and_local_sink()
1506 if (link->reported_link_cap.link_rate == LINK_RATE_UNKNOWN) in detect_link_and_local_sink()
1508 link->reported_link_cap.link_rate = get_max_edp_link_rate(link); in detect_link_and_local_sink()
/linux/drivers/scsi/mpi3mr/
H A Dmpi3mr_transport.c549 static enum sas_linkrate mpi3mr_convert_phy_link_rate(u8 link_rate) in mpi3mr_convert_phy_link_rate() argument
553 switch (link_rate) { in mpi3mr_convert_phy_link_rate()
1075 u64 sas_address_parent, u16 handle, u8 phy_number, u8 link_rate, in mpi3mr_update_links() argument
1096 if (handle && (link_rate >= MPI3_SAS_NEG_LINK_RATE_1_5)) { in mpi3mr_update_links()
1108 mpi3mr_convert_phy_link_rate(link_rate); in mpi3mr_update_links()
1116 link_rate, phy_number, handle, (unsigned long long) in mpi3mr_update_links()
1134 u8 link_rate; in mpi3mr_sas_host_refresh() local
1160 link_rate = in mpi3mr_sas_host_refresh()
1173 if (attached_handle && link_rate < MPI3_SAS_NEG_LINK_RATE_1_5) in mpi3mr_sas_host_refresh()
1174 link_rate = MPI3_SAS_NEG_LINK_RATE_1_5; in mpi3mr_sas_host_refresh()
[all …]
/linux/include/linux/phy/
H A Dphy-dp.h28 unsigned int link_rate; member
/linux/drivers/phy/mediatek/
H A Dphy-mtk-dp.c115 switch (opts->dp.link_rate) { in mtk_dp_phy_configure()
119 opts->dp.link_rate); in mtk_dp_phy_configure()
/linux/include/drm/display/
H A Ddrm_dp_helper.h70 u8 drm_dp_link_rate_to_bw_code(int link_rate);
320 static inline bool drm_dp_is_uhbr_rate(int link_rate) in drm_dp_is_uhbr_rate() argument
322 return link_rate >= 1000000; in drm_dp_is_uhbr_rate()
981 int link_rate; member
/linux/drivers/scsi/pm8001/
H A Dpm8001_init.c51 static ulong link_rate = LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | LINKRATE_120; variable
52 module_param(link_rate, ulong, 0644);
53 MODULE_PARM_DESC(link_rate, "Enable link rate.\n"
556 if (link_rate >= 1 && link_rate <= 15) in pm8001_pci_alloc()
557 pm8001_ha->link_rate = (link_rate << 8); in pm8001_pci_alloc()
559 pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 | in pm8001_pci_alloc()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_mst.c1220 int link_rate, int lane_count) in intel_mst_probed_link_params_valid() argument
1222 return intel_dp->link.mst_probed_rate == link_rate && in intel_mst_probed_link_params_valid()
1227 int link_rate, int lane_count) in intel_mst_set_probed_link_params() argument
1229 intel_dp->link.mst_probed_rate = link_rate; in intel_mst_set_probed_link_params()
2185 int link_rate; in intel_dp_mst_prepare_probe() local
2194 link_rate = max_bw_config.rate; in intel_dp_mst_prepare_probe()
2197 if (intel_mst_probed_link_params_valid(intel_dp, link_rate, lane_count)) in intel_dp_mst_prepare_probe()
2200 intel_dp_compute_rate(intel_dp, link_rate, &link_bw, &rate_select); in intel_dp_mst_prepare_probe()
2202 intel_dp_link_training_set_mode(intel_dp, link_rate, false, false); in intel_dp_mst_prepare_probe()
2206 intel_mst_set_probed_link_params(intel_dp, link_rate, lane_count); in intel_dp_mst_prepare_probe()
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c189 unsigned int link_rate; member
1112 switch (dp->link_rate) { in rk_udphy_dp_phy_verify_link_rate()
1117 udphy->link_rate = dp->link_rate; in rk_udphy_dp_phy_verify_link_rate()
1225 switch (dp->link_rate) { in rk_udphy_dp_phy_configure()
1266 switch (udphy->link_rate) { in rk_udphy_dp_phy_configure()
H A Dphy-rockchip-samsung-hdptx.c428 unsigned int link_rate; member
1801 switch (dp->link_rate) { in rk_hdptx_phy_verify_dp_config()
1843 switch (dp->link_rate) { in rk_hdptx_phy_set_rate()
1856 hdptx->link_rate = dp->link_rate; in rk_hdptx_phy_set_rate()
1928 switch (hdptx->link_rate) { in rk_hdptx_phy_set_voltage()
/linux/drivers/scsi/isci/
H A Dphy.c127 u32 llctl, link_rate; in sci_phy_link_layer_initialization() local
272 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3; in sci_phy_link_layer_initialization()
275 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2; in sci_phy_link_layer_initialization()
278 link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1; in sci_phy_link_layer_initialization()
281 llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); in sci_phy_link_layer_initialization()
/linux/drivers/scsi/hisi_sas/
H A Dhisi_sas_v1_hw.c1322 u32 irq_value, context, port_id, link_rate; in int_phyup_v1_hw() local
1357 link_rate = hisi_sas_read32(hisi_hba, PHY_CONN_RATE); in int_phyup_v1_hw()
1358 link_rate = (link_rate >> (phy_no * 4)) & 0xf; in int_phyup_v1_hw()
1359 sas_phy->linkrate = link_rate; in int_phyup_v1_hw()
1364 phy_no, link_rate); in int_phyup_v1_hw()
/linux/drivers/phy/apple/
H A Datc.c1899 enum atcphy_dp_link_rate link_rate; in atcphy_dpphy_configure() local
1907 switch (opts->link_rate) { in atcphy_dpphy_configure()
1909 link_rate = ATCPHY_DP_LINK_RATE_RBR; in atcphy_dpphy_configure()
1912 link_rate = ATCPHY_DP_LINK_RATE_HBR; in atcphy_dpphy_configure()
1915 link_rate = ATCPHY_DP_LINK_RATE_HBR2; in atcphy_dpphy_configure()
1918 link_rate = ATCPHY_DP_LINK_RATE_HBR3; in atcphy_dpphy_configure()
1923 dev_err(atcphy->dev, "Unsupported link rate: %d\n", opts->link_rate); in atcphy_dpphy_configure()
1927 return atcphy_dp_configure(atcphy, link_rate); in atcphy_dpphy_configure()
/linux/include/linux/
H A Datmdev.h119 int link_rate; /* link rate (default: OC3) */ member
/linux/drivers/scsi/mpt3sas/
H A Dmpt3sas_transport.c152 _transport_convert_phy_link_rate(u8 link_rate) in _transport_convert_phy_link_rate() argument
156 switch (link_rate) { in _transport_convert_phy_link_rate()
1160 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate, in mpt3sas_transport_update_links() argument
1182 if (handle && (link_rate >= MPI2_SAS_NEG_LINK_RATE_1_5)) { in mpt3sas_transport_update_links()
1204 _transport_convert_phy_link_rate(link_rate); in mpt3sas_transport_update_links()
1212 link_rate, phy_number, handle, (unsigned long long) in mpt3sas_transport_update_links()
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_dmcu.h291 unsigned int link_rate:4; /*[19:16]*/ member
H A Ddce_stream_encoder.c973 if (param->link_settings.link_rate != LINK_RATE_UNKNOWN) { in dce110_stream_encoder_dp_unblank()
985 param->link_settings.link_rate in dce110_stream_encoder_dp_unblank()
/linux/drivers/scsi/
H A Dipr.c2049 static const char *link_rate[] = { variable
2097 cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log_path_elem()
2103 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log_path_elem()
2109 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log_path_elem()
2115 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log_path_elem()
2121 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log_path_elem()
2131 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log_path_elem()
2167 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log64_path_elem()
2177 link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK], in ipr_log64_path_elem()
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pciercx-defs.h315 __BITFIELD_FIELD(uint32_t link_rate:4,

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