Searched refs:link_n (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/gma500/ |
| H A D | cdv_intel_dp.c | 946 uint32_t link_n; member
977 m_n->link_n = link_clock; in cdv_intel_dp_compute_m_n()
978 cdv_intel_reduce_ratio(&m_n->link_m, &m_n->link_n); in cdv_intel_dp_compute_m_n()
1030 REG_WRITE(PIPE_DP_LINK_N(pipe), m_n.link_n); in cdv_intel_dp_set_m_n()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_display.c | 2544 compute_m_n(&m_n->link_m, &m_n->link_n, in intel_link_compute_m_n()
2591 intel_de_write(display, link_n_reg, m_n->link_n); in intel_set_m_n()
3348 m_n->link_n = intel_de_read(display, link_n_reg) & DATA_LINK_M_N_MASK; in intel_get_m_n()
4079 if (!m_n->link_n) in intel_dotclock_calculate()
4083 m_n->link_n * intel_dp_link_symbol_size(link_freq)); in intel_dotclock_calculate()
4846 m_n->link_n == m2_n2->link_n; in intel_compare_link_m_n()
5140 current_config->name.link_n, \ in intel_pipe_config_compare()
5145 pipe_config->name.link_n); \ in intel_pipe_config_compare()
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| H A D | intel_display_types.h | 980 u32 link_n; member
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| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 672 u32 dp_br, link_m, link_n, htotal, vtotal; in vgpu_update_refresh_rate() local
692 link_n = vgpu_vreg_t(vgpu, PIPE_LINK_N1(display, TRANSCODER_A)); in vgpu_update_refresh_rate()
698 if (dp_br && link_n && htotal && vtotal) { in vgpu_update_refresh_rate()
704 pixel_clk = div_u64(mul_u32_u32(link_m, dp_br), link_n); in vgpu_update_refresh_rate()
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