| /linux/drivers/net/ipa/ |
| H A D | ipa_resource.c | 50 if (resource->limits[j].min || resource->limits[j].max) in ipa_resource_limits_valid()
63 if (resource->limits[j].min || resource->limits[j].max) in ipa_resource_limits_valid()
99 ylimits = group_count == 1 ? NULL : &resource->limits[1]; in ipa_resource_config_src()
101 &resource->limits[0], ylimits); in ipa_resource_config_src()
106 ylimits = group_count == 3 ? NULL : &resource->limits[3]; in ipa_resource_config_src()
108 &resource->limits[2], ylimits); in ipa_resource_config_src()
113 ylimits = group_count == 5 ? NULL : &resource->limits[5]; in ipa_resource_config_src()
115 &resource->limits[4], ylimits); in ipa_resource_config_src()
120 ylimits = group_count == 7 ? NULL : &resource->limits[7]; in ipa_resource_config_src()
122 &resource->limits[6], ylimits); in ipa_resource_config_src()
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| /linux/drivers/infiniband/hw/mthca/ |
| H A D | mthca_main.c | 168 mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8; in mthca_dev_lim()
196 mdev->limits.num_ports = dev_lim->num_ports; in mthca_dev_lim()
197 mdev->limits.vl_cap = dev_lim->max_vl; in mthca_dev_lim()
198 mdev->limits.mtu_cap = dev_lim->max_mtu; in mthca_dev_lim()
199 mdev->limits.gid_table_len = dev_lim->max_gids; in mthca_dev_lim()
200 mdev->limits.pkey_table_len = dev_lim->max_pkeys; in mthca_dev_lim()
201 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; in mthca_dev_lim()
207 mdev->limits.max_sg = min_t(int, dev_lim->max_sg, in mthca_dev_lim()
214 mdev->limits.max_wqes = dev_lim->max_qp_sz; in mthca_dev_lim()
215 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; in mthca_dev_lim()
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| H A D | mthca_profile.c | 94 profile[MTHCA_RES_MTT].size = dev->limits.mtt_seg_size; in mthca_make_profile()
173 dev->limits.num_qps = profile[i].num; in mthca_make_profile()
178 dev->limits.num_eecs = profile[i].num; in mthca_make_profile()
183 dev->limits.num_srqs = profile[i].num; in mthca_make_profile()
188 dev->limits.num_cqs = profile[i].num; in mthca_make_profile()
199 dev->limits.num_eqs = profile[i].num; in mthca_make_profile()
212 dev->limits.num_mgms = profile[i].num >> 1; in mthca_make_profile()
213 dev->limits.num_amgms = profile[i].num >> 1; in mthca_make_profile()
220 dev->limits.num_mpts = profile[i].num; in mthca_make_profile()
226 dev->limits.num_mtt_segs = profile[i].num; in mthca_make_profile()
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| H A D | mthca_mr.c | 220 for (i = dev->limits.mtt_seg_size / 8; i < size; i <<= 1) in __mthca_alloc_mtt()
266 mtt->first_seg * dev->limits.mtt_seg_size + in __mthca_write_mtt()
319 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size + in mthca_tavor_write_mtt_seg()
338 BUG_ON(s % dev->limits.mtt_seg_size); in mthca_arbel_write_mtt_seg()
341 s / dev->limits.mtt_seg_size, &dma_handle); in mthca_arbel_write_mtt_seg()
474 mr->mtt->first_seg * dev->limits.mtt_seg_size); in mthca_mr_alloc()
488 key & (dev->limits.num_mpts - 1)); in mthca_mr_alloc()
555 (dev->limits.num_mpts - 1)); in mthca_free_mr()
569 dev->limits.num_mpts, in mthca_init_mr_table()
570 ~0, dev->limits.reserved_mrws); in mthca_init_mr_table()
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| H A D | mthca_provider.c | 89 props->page_size_cap = mdev->limits.page_size_cap; in mthca_query_device()
90 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps; in mthca_query_device()
91 props->max_qp_wr = mdev->limits.max_wqes; in mthca_query_device()
92 props->max_send_sge = mdev->limits.max_sg; in mthca_query_device()
93 props->max_recv_sge = mdev->limits.max_sg; in mthca_query_device()
94 props->max_sge_rd = mdev->limits.max_sg; in mthca_query_device()
95 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs; in mthca_query_device()
96 props->max_cqe = mdev->limits.max_cqes; in mthca_query_device()
97 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws; in mthca_query_device()
98 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds; in mthca_query_device()
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| H A D | mthca_srq.c | 215 if (attr->max_wr > dev->limits.max_srq_wqes || in mthca_alloc_srq()
216 attr->max_sge > dev->limits.max_srq_sge) in mthca_alloc_srq()
232 if (!mthca_is_memfree(dev) && (ds > dev->limits.max_desc_sz)) in mthca_alloc_srq()
285 srq->srqn & (dev->limits.num_srqs - 1), in mthca_alloc_srq()
355 srq->srqn & (dev->limits.num_srqs - 1)); in mthca_free_srq()
437 srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1)); in mthca_srq_event()
645 return dev->limits.max_sg; in mthca_max_srq_sge()
661 return min_t(int, dev->limits.max_sg, in mthca_max_srq_sge()
662 ((1 << (fls(dev->limits.max_desc_sz) - 1)) - in mthca_max_srq_sge()
677 dev->limits.num_srqs, in mthca_init_srq_table()
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| H A D | mthca_qp.c | 245 qp = mthca_array_get(&dev->qp_table.qp, qpn & (dev->limits.num_qps - 1)); in mthca_qp_event()
317 param.port_width = dev->limits.port_width_cap; in init_port()
318 param.vl_cap = dev->limits.vl_cap; in init_port()
319 param.mtu_cap = dev->limits.mtu_cap; in init_port()
320 param.gid_cap = dev->limits.gid_table_len; in init_port()
321 param.pkey_cap = dev->limits.pkey_table_len; in init_port()
405 if (port_num == 0 || port_num > dev->limits.num_ports) in to_rdma_ah_attr()
423 (dev->limits.gid_table_len - 1), in to_rdma_ah_attr()
533 if (grh->sgid_index >= dev->limits.gid_table_len) { in mthca_path_set()
536 dev->limits.gid_table_len - 1); in mthca_path_set()
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| H A D | mthca_uar.c | 59 dev->limits.num_uars, in mthca_init_uar_table()
60 dev->limits.num_uars - 1, in mthca_init_uar_table()
61 dev->limits.reserved_uars + 1); in mthca_init_uar_table()
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| H A D | mthca_mcg.c | 205 BUG_ON(index < dev->limits.num_mgms); in mthca_multicast_attach()
285 BUG_ON(amgm_index_to_free < dev->limits.num_mgms); in mthca_multicast_detach()
304 BUG_ON(index < dev->limits.num_mgms); in mthca_multicast_detach()
318 int table_size = dev->limits.num_mgms + dev->limits.num_amgms; in mthca_init_mcg_table()
323 dev->limits.num_mgms); in mthca_init_mcg_table()
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| /linux/drivers/clk/ |
| H A D | clk-axi-clkgen.c | 66 struct axi_clkgen_limits limits; member
132 static void axi_clkgen_calc_params(const struct axi_clkgen_limits *limits, in axi_clkgen_calc_params() argument
151 d_min = max(DIV_ROUND_UP(fin, limits->fpfd_max), 1); in axi_clkgen_calc_params()
152 d_max = min(fin / limits->fpfd_min, 80); in axi_clkgen_calc_params()
155 fvco_min_fract = limits->fvco_min << fract_shift; in axi_clkgen_calc_params()
156 fvco_max_fract = limits->fvco_max << fract_shift; in axi_clkgen_calc_params()
350 const struct axi_clkgen_limits *limits = &axi_clkgen->limits; in axi_clkgen_set_rate() local
358 axi_clkgen_calc_params(limits, parent_rate, rate, &d, &m, &dout); in axi_clkgen_set_rate()
399 const struct axi_clkgen_limits *limits = &axi_clkgen->limits; in axi_clkgen_determine_rate() local
403 axi_clkgen_calc_params(limits, req->best_parent_rate, req->rate, in axi_clkgen_determine_rate()
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| /linux/drivers/md/ |
| H A D | dm-table.c | 233 struct queue_limits *limits = data; in device_area_is_invalid() local
237 limits->logical_block_size >> SECTOR_SHIFT; in device_area_is_invalid()
291 limits->logical_block_size, bdev); in device_area_is_invalid()
299 limits->logical_block_size, bdev); in device_area_is_invalid()
413 struct queue_limits *limits = data; in dm_set_device_limits() local
428 limits->features |= (q->limits.features & BLK_FEAT_ATOMIC_WRITES); in dm_set_device_limits()
430 if (blk_stack_limits(limits, &q->limits, in dm_set_device_limits()
436 q->limits.physical_block_size, in dm_set_device_limits()
437 q->limits.logical_block_size, in dm_set_device_limits()
438 q->limits.alignment_offset, in dm_set_device_limits()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp_mst.c | 444 const struct link_config_limits *limits) in mst_stream_compute_link_config() argument
446 crtc_state->lane_count = limits->max_lane_count; in mst_stream_compute_link_config()
447 crtc_state->port_clock = limits->max_rate; in mst_stream_compute_link_config()
454 limits->link.min_bpp_x16, in mst_stream_compute_link_config()
455 limits->link.max_bpp_x16, in mst_stream_compute_link_config()
462 const struct link_config_limits *limits) in mst_stream_dsc_compute_link_config() argument
467 crtc_state->pipe_bpp = limits->pipe.max_bpp; in mst_stream_dsc_compute_link_config()
471 FXP_Q4_ARGS(limits->link.min_bpp_x16), FXP_Q4_ARGS(limits->link.max_bpp_x16)); in mst_stream_dsc_compute_link_config()
473 crtc_state->lane_count = limits->max_lane_count; in mst_stream_dsc_compute_link_config()
474 crtc_state->port_clock = limits->max_rate; in mst_stream_dsc_compute_link_config()
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| H A D | intel_dp.c | 1761 const struct link_config_limits *limits) in intel_dp_compute_link_config_wide() argument
1766 for (bpp = fxp_q4_to_int(limits->link.max_bpp_x16); in intel_dp_compute_link_config_wide()
1767 bpp >= fxp_q4_to_int(limits->link.min_bpp_x16); in intel_dp_compute_link_config_wide()
1774 if (link_rate < limits->min_rate || in intel_dp_compute_link_config_wide()
1775 link_rate > limits->max_rate) in intel_dp_compute_link_config_wide()
1778 for (lane_count = limits->min_lane_count; in intel_dp_compute_link_config_wide()
1779 lane_count <= limits->max_lane_count; in intel_dp_compute_link_config_wide()
1994 const struct link_config_limits *limits, in dsc_compute_link_config() argument
2003 if (link_rate < limits->min_rate || link_rate > limits->max_rate) in dsc_compute_link_config()
2006 for (lane_count = limits->min_lane_count; in dsc_compute_link_config()
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| /linux/drivers/macintosh/ |
| H A D | therm_adt746x.c | 80 u8 limits[3]; member
219 th->limits[0], th->limits[1], th->limits[2], in display_stats()
237 int var = th->temps[i] - th->limits[i]; in update_fans_speed()
314 th->limits[i] = default_limits_chip[i] + limit_adjust; in set_limit()
315 write_reg(th, LIMIT_REG[i], th->limits[i]); in set_limit()
318 th->limits[i] = default_limits_local[i] + limit_adjust; in set_limit()
378 BUILD_SHOW_FUNC_INT(sensor1_limit, th->limits[1])
379 BUILD_SHOW_FUNC_INT(sensor2_limit, th->limits[2])
535 th->initial_limits[2], th->limits[0], th->limits[1], in probe_thermostat()
536 th->limits[2]); in probe_thermostat()
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| /linux/drivers/clk/sophgo/ |
| H A D | clk-sg2044-pll.c | 73 const struct sg2044_pll_limit *limits; member
165 static int sg2042_pll_compute_postdiv(const struct sg2044_pll_limit *limits, in sg2042_pll_compute_postdiv() argument
177 for_each_pll_limit_range(div2, &limits[PLL_LIMIT_POSTDIV2]) { in sg2042_pll_compute_postdiv()
178 for_each_pll_limit_range(div1, &limits[PLL_LIMIT_POSTDIV1]) { in sg2042_pll_compute_postdiv()
207 static int sg2044_compute_pll_setting(const struct sg2044_pll_limit *limits, in sg2044_compute_pll_setting() argument
217 for_each_pll_limit_range(fbdiv, &limits[PLL_LIMIT_FBDIV]) { in sg2044_compute_pll_setting()
218 for_each_pll_limit_range(refdiv, &limits[PLL_LIMIT_REFDIV]) { in sg2044_compute_pll_setting()
221 if (!sg2044_clk_fit_limit(vco, &limits[PLL_LIMIT_FOUTVCO])) in sg2044_compute_pll_setting()
224 ret = sg2042_pll_compute_postdiv(limits, in sg2044_compute_pll_setting()
268 target = clamp(req->rate, pll->pll.limits[PLL_LIMIT_FOUT].min, in sg2044_pll_determine_rate()
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| /linux/Documentation/admin-guide/sysctl/ |
| H A D | user.rst | 15 limits on the number of namespaces and other objects that have
16 per user per user namespace limits.
18 The primary purpose of these limits is to stop programs that
21 intention that the defaults of these limits are set high enough that
22 no program in normal operation should run into these limits.
31 limits in the user namespaces of those users.
34 user namespace does not allow a user to escape their current limits.
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| /linux/include/linux/ |
| H A D | t10-pi.h | 45 rq->q->limits.integrity.interval_exp) in t10_pi_ref_tag()
46 shift = rq->q->limits.integrity.interval_exp; in t10_pi_ref_tag()
70 rq->q->limits.integrity.interval_exp) in ext_pi_ref_tag()
71 shift = rq->q->limits.integrity.interval_exp; in ext_pi_ref_tag()
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| /linux/drivers/gpu/drm/exynos/ |
| H A D | exynos_drm_ipp.c | 245 if (copy_to_user((void __user *)ptr, format->limits, in exynos_drm_ipp_get_limits_ioctl()
246 sizeof(*format->limits) * format->num_limits)) in exynos_drm_ipp_get_limits_ioctl()
431 static void __get_size_limit(const struct drm_exynos_ipp_limit *limits, in __get_size_limit() argument
435 const struct drm_exynos_ipp_limit *l = limits; in __get_size_limit()
440 for (l = limits; l - limits < num_limits; l++) { in __get_size_limit()
477 const struct drm_exynos_ipp_limit *limits, unsigned int num_limits, in exynos_drm_ipp_check_size_limits() argument
485 if (!limits) in exynos_drm_ipp_check_size_limits()
488 __get_size_limit(limits, num_limits, IPP_LIMIT_BUFFER, &l); in exynos_drm_ipp_check_size_limits()
497 __get_size_limit(limits, num_limits, id, &l); in exynos_drm_ipp_check_size_limits()
524 const struct drm_exynos_ipp_limit *limits, in exynos_drm_ipp_check_scale_limits() argument
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| /linux/Documentation/hwmon/ |
| H A D | lm77.rst | 27 The LM77 implements 3 limits: low (temp1_min), high (temp1_max) and
29 applies to all 3 limits. The relative difference is stored in a single
31 the limit and its hysteresis is always the same for all 3 limits.
44 hysteresis applies automatically to the low and high limits.
45 * The limits should be set before the hysteresis.
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| H A D | emc1403.rst | 72 The chips implement three limits for each sensor: low (tempX_min), high
74 hysteresis mechanism which applies to all limits. The relative difference
77 all three limits.
90 hysteresis applies automatically to all other limits.
91 * The limits should be set before the hysteresis.
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| /linux/drivers/regulator/ |
| H A D | max14577-regulator.c | 41 const struct maxim_charger_current *limits = in max14577_reg_get_current_limit() local
53 return limits->min; in max14577_reg_get_current_limit()
57 return limits->high_start + reg_data * limits->high_step; in max14577_reg_get_current_limit()
66 const struct maxim_charger_current *limits = in max14577_reg_set_current_limit() local
72 ret = maxim_charger_calc_reg_current(limits, min_uA, max_uA, ®_data); in max14577_reg_set_current_limit()
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| /linux/drivers/platform/x86/ |
| H A D | intel_ips.c | 321 struct ips_mcp_limits *limits; member
636 if (avg > (ips->limits->core_temp_limit * 100)) in cpu_exceeded()
662 if (ips->mch_avg_temp > (ips->limits->mch_temp_limit * 100)) in mch_exceeded()
681 if (ips->mcp_power_limit < ips->limits->mcp_power_limit || in verify_limits()
683 ips->mcp_power_limit = ips->limits->mcp_power_limit; in verify_limits()
685 if (ips->mcp_temp_limit < ips->limits->core_temp_limit || in verify_limits()
686 ips->mcp_temp_limit < ips->limits->mch_temp_limit || in verify_limits()
688 ips->mcp_temp_limit = min(ips->limits->core_temp_limit, in verify_limits()
689 ips->limits->mch_temp_limit); in verify_limits()
1285 struct ips_mcp_limits *limits = NULL; in ips_detect_cpu() local
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| H A D | asus-armoury.c | 842 static bool has_valid_limit(const char *name, const struct power_limits *limits) in has_valid_limit() argument
846 if (!limits) in has_valid_limit()
850 limit_value = limits->ppt_pl1_spl_max; in has_valid_limit()
852 limit_value = limits->ppt_pl2_sppt_max; in has_valid_limit()
854 limit_value = limits->ppt_pl3_fppt_max; in has_valid_limit()
856 limit_value = limits->ppt_apu_sppt_max; in has_valid_limit()
858 limit_value = limits->ppt_platform_sppt_max; in has_valid_limit()
860 limit_value = limits->nv_dynamic_boost_max; in has_valid_limit()
862 limit_value = limits->nv_temp_target_max; in has_valid_limit()
865 limit_value = limits->nv_tgp_max; in has_valid_limit()
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| /linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | legacy_dpm.c | 384 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits = in amdgpu_parse_extended_power_table() local
394 1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record))); in amdgpu_parse_extended_power_table()
398 u32 size = limits->numEntries * in amdgpu_parse_extended_power_table()
405 limits->numEntries; in amdgpu_parse_extended_power_table()
406 entry = &limits->entries[0]; in amdgpu_parse_extended_power_table()
408 for (i = 0; i < limits->numEntries; i++) { in amdgpu_parse_extended_power_table()
445 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits = in amdgpu_parse_extended_power_table() local
451 u32 size = limits->numEntries * in amdgpu_parse_extended_power_table()
458 limits->numEntries; in amdgpu_parse_extended_power_table()
459 entry = &limits->entries[0]; in amdgpu_parse_extended_power_table()
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| /linux/Documentation/admin-guide/cgroup-v1/ |
| H A D | rdma.rst | 47 But nothing limits to have it more. At present hundreds of RDMA devices per
70 (b) No resource limits were configured, but IB/RDMA stack tries to
72 running without limits and later on when limits are enforced during uncharging,
75 Resource pool is destroyed if all the resource limits are set to max and
81 IB stack honors limits enforced by the rdma controller. When application
82 query about maximum resource limits of IB device, it returns minimum of
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