Searched refs:level1 (Results 1 – 7 of 7) sorted by relevance
794 u32 level1; in mtu3_irq() local799 level1 = mtu3_readl(mtu->mac_base, U3D_LV1ISR); in mtu3_irq()800 level1 &= mtu3_readl(mtu->mac_base, U3D_LV1IER); in mtu3_irq()802 if (level1 & EP_CTRL_INTR) in mtu3_irq()805 if (level1 & MAC2_INTR) in mtu3_irq()808 if (level1 & MAC3_INTR) in mtu3_irq()811 if (level1 & BMU_INTR) in mtu3_irq()814 if (level1 & QMU_INTR) in mtu3_irq()
50 struct irdma_pble_info level1; member
414 struct irdma_pble_info *lvl1 = &palloc->level1; in get_lvl1_pble()513 &palloc->level1.chunkinfo); in irdma_free_pble()
2842 arr = palloc->level1.addr; in irdma_check_mr_contiguous()2886 pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 : in irdma_setup_pbles()2929 arr = palloc->level1.addr; in irdma_handle_q_mem()2950 hmc_p->idx = palloc->level1.idx; in irdma_handle_q_mem()2952 hmc_p->idx = palloc->level1.idx + req->sq_pages; in irdma_handle_q_mem()2967 hmc_p->idx = palloc->level1.idx; in irdma_handle_q_mem()2982 hmc_p->idx = palloc->level1.idx; in irdma_handle_q_mem()3219 pbl = palloc->level1.addr; in irdma_set_page()3286 stag_info->first_pm_pbl_index = palloc->level1.idx; in irdma_hwreg_mr()4114 stag_info.reg_addr_pa = *palloc->level1.addr; in irdma_post_send()[all …]
704 dma_addr_t *pg_arr = (dma_addr_t *)aeq->palloc.level1.addr; in irdma_destroy_virt_aeq()1479 pg_arr = (dma_addr_t *)aeq->palloc.level1.addr; in irdma_create_virt_aeq()1532 info.first_pm_pbl_idx = aeq->palloc.level1.idx; in irdma_create_aeq()
323 lda [%g1] ASI_M_BYPASS, %g2 ! get level1 entry for 0x0347 lda [%g1] ASI_M_BYPASS, %g2 ! get level1 entry for 0x0
94 ldr r12, omap_ih1_base @ set pointer to level1 handler