Searched refs:lane_base (Results 1 – 1 of 1) sorted by relevance
910 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v4_0_config_lpcdrx() local918 writel(0x3, lane_base + REG_DSI_7nm_PHY_LN_LPRX_CTRL(phy_lane_0)); in dsi_phy_hw_v4_0_config_lpcdrx()920 writel(0, lane_base + REG_DSI_7nm_PHY_LN_LPRX_CTRL(phy_lane_0)); in dsi_phy_hw_v4_0_config_lpcdrx()929 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v4_0_lane_settings() local941 writel(0, lane_base + REG_DSI_7nm_PHY_LN_LPRX_CTRL(i)); in dsi_phy_hw_v4_0_lane_settings()942 writel(0x0, lane_base + REG_DSI_7nm_PHY_LN_PIN_SWAP(i)); in dsi_phy_hw_v4_0_lane_settings()949 writel(0x0, lane_base + REG_DSI_7nm_PHY_LN_CFG0(i)); in dsi_phy_hw_v4_0_lane_settings()950 writel(0x0, lane_base + REG_DSI_7nm_PHY_LN_CFG1(i)); in dsi_phy_hw_v4_0_lane_settings()951 writel(i == 4 ? 0x8a : 0xa, lane_base + REG_DSI_7nm_PHY_LN_CFG2(i)); in dsi_phy_hw_v4_0_lane_settings()952 writel(tx_dctrl[i], lane_base + REG_DSI_7nm_PHY_LN_TX_DCTRL(i)); in dsi_phy_hw_v4_0_lane_settings()