Searched refs:l2x0_base (Results 1 – 3 of 3) sorted by relevance
40 static void __iomem *l2x0_base; variable135 void __iomem *base = l2x0_base; in l2c_disable()146 l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); in l2c_save()151 void __iomem *base = l2x0_base; in l2c_resume()190 void __iomem *base = l2x0_base; in l2c210_inv_range()209 void __iomem *base = l2x0_base; in l2c210_clean_range()218 void __iomem *base = l2x0_base; in l2c210_flush_range()227 void __iomem *base = l2x0_base; in l2c210_flush_all()237 __l2c210_cache_sync(l2x0_base); in l2c210_sync()310 void __iomem *base = l2x0_base; in l2c220_inv_range()[all …]
20 static void __iomem *l2x0_base; variable66 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT0_CFG - 4 * idx); in l2x0_pmu_counter_config_write()71 return readl_relaxed(l2x0_base + L2X0_EVENT_CNT0_VAL - 4 * idx); in l2x0_pmu_counter_read()76 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT0_VAL - 4 * idx); in l2x0_pmu_counter_write()81 u32 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_enable()83 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_enable()88 u32 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_disable()90 writel_relaxed(val, l2x0_base + L2X0_EVENT_CNT_CTRL); in __l2x0_pmu_disable()500 l2x0_base = base; in l2x0_pmu_register()507 if (!l2x0_base) in l2x0_pmu_init()
198 void __iomem *l2x0_base = omap4_get_l2cache_base(); in save_l2x0_context() local200 if (l2x0_base && sar_base) { in save_l2x0_context()