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Searched refs:kiq (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gfx.c310 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init_ring() local
311 struct amdgpu_irq_src *irq = &kiq->irq; in amdgpu_gfx_kiq_init_ring()
312 struct amdgpu_ring *ring = &kiq->ring; in amdgpu_gfx_kiq_init_ring()
315 spin_lock_init(&kiq->ring_lock); in amdgpu_gfx_kiq_init_ring()
323 (adev->doorbell_index.kiq + in amdgpu_gfx_kiq_init_ring()
331 ring->eop_gpu_addr = kiq->eop_gpu_addr; in amdgpu_gfx_kiq_init_ring()
351 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_fini() local
353 amdgpu_bo_free_kernel(&kiq->eop_obj, &kiq->eop_gpu_addr, NULL); in amdgpu_gfx_kiq_fini()
361 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init() local
364 AMDGPU_GEM_DOMAIN_GTT, &kiq->eop_obj, in amdgpu_gfx_kiq_init()
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H A Damdgpu_gmc.c780 struct amdgpu_ring *ring = &adev->gfx.kiq[inst].ring; in amdgpu_gmc_flush_gpu_tlb_pasid()
781 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; in amdgpu_gmc_flush_gpu_tlb_pasid() local
816 ndw = kiq->pmf->invalidate_tlbs_size + 8; in amdgpu_gmc_flush_gpu_tlb_pasid()
819 ndw += kiq->pmf->invalidate_tlbs_size; in amdgpu_gmc_flush_gpu_tlb_pasid()
822 ndw += kiq->pmf->invalidate_tlbs_size; in amdgpu_gmc_flush_gpu_tlb_pasid()
824 spin_lock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
827 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
831 kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 2, all_hub); in amdgpu_gmc_flush_gpu_tlb_pasid()
834 kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 0, all_hub); in amdgpu_gmc_flush_gpu_tlb_pasid()
836 kiq->pmf->kiq_invalidate_tlbs(ring, pasid, flush_type, all_hub); in amdgpu_gmc_flush_gpu_tlb_pasid()
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H A Damdgpu_amdkfd.c865 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; in amdgpu_amdkfd_unmap_hiq() local
866 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_amdkfd_unmap_hiq()
871 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_amdkfd_unmap_hiq()
891 spin_lock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
893 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { in amdgpu_amdkfd_unmap_hiq()
894 spin_unlock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
899 kiq->pmf->kiq_unmap_queues(kiq_ring, ring, RESET_QUEUES, 0, 0); in amdgpu_amdkfd_unmap_hiq()
910 spin_unlock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
H A Dmes_v11_0.c1583 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in mes_v11_0_kiq_enable_queue() local
1584 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in mes_v11_0_kiq_enable_queue()
1587 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v11_0_kiq_enable_queue()
1590 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v11_0_kiq_enable_queue()
1596 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring[0]); in mes_v11_0_kiq_enable_queue()
1608 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_queue_init()
1665 spin_lock_init(&adev->gfx.kiq[0].ring_lock); in mes_v11_0_kiq_ring_init()
1667 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_kiq_ring_init()
1693 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_mqd_sw_init()
1800 amdgpu_bo_free_kernel(&adev->gfx.kiq[0].ring.mqd_obj, in mes_v11_0_sw_fini()
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H A Dmes_v12_1.c1436 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in mes_v12_1_kiq_enable_queue() local
1437 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[xcc_id].ring; in mes_v12_1_kiq_enable_queue()
1440 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v12_1_kiq_enable_queue()
1443 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v12_1_kiq_enable_queue()
1449 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring[inst]); in mes_v12_1_kiq_enable_queue()
1467 ring = &adev->gfx.kiq[xcc_id].ring; in mes_v12_1_queue_init()
1540 spin_lock_init(&adev->gfx.kiq[xcc_id].ring_lock); in mes_v12_1_kiq_ring_init()
1542 ring = &adev->gfx.kiq[xcc_id].ring; in mes_v12_1_kiq_ring_init()
1577 ring = &adev->gfx.kiq[xcc_id].ring; in mes_v12_1_mqd_sw_init()
1684 amdgpu_bo_free_kernel(&adev->gfx.kiq[xcc_id].ring.mqd_obj, in mes_v12_1_sw_fini()
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H A Dmes_v12_0.c1659 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in mes_v12_0_kiq_enable_queue() local
1660 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in mes_v12_0_kiq_enable_queue()
1663 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v12_0_kiq_enable_queue()
1666 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); in mes_v12_0_kiq_enable_queue()
1672 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring[0]); in mes_v12_0_kiq_enable_queue()
1689 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_queue_init()
1764 spin_lock_init(&adev->gfx.kiq[0].ring_lock); in mes_v12_0_kiq_ring_init()
1766 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_kiq_ring_init()
1792 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_mqd_sw_init()
1893 amdgpu_bo_free_kernel(&adev->gfx.kiq[0].ring.mqd_obj, in mes_v12_0_sw_fini()
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H A Dgfx_v9_0.c1093 adev->gfx.kiq[0].pmf = &gfx_v9_0_kiq_pm4_funcs; in gfx_v9_0_set_kiq_pm4_funcs()
2473 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v9_0_sw_fini()
3477 adev->gfx.kiq[0].ring.sched.ready = false; in gfx_v9_0_cp_compute_enable()
3761 (adev->doorbell_index.kiq * 2) << 2); in gfx_v9_0_kiq_init_register()
3852 tmp_mqd = (struct v9_mqd *)adev->gfx.kiq[0].mqd_backup; in gfx_v9_0_kiq_init_queue()
3855 if (adev->gfx.kiq[0].mqd_backup) in gfx_v9_0_kiq_init_queue()
3856 memcpy(mqd, adev->gfx.kiq[0].mqd_backup, sizeof(struct v9_mqd_allocation)); in gfx_v9_0_kiq_init_queue()
3880 if (adev->gfx.kiq[0].mqd_backup) in gfx_v9_0_kiq_init_queue()
3881 memcpy(adev->gfx.kiq[0].mqd_backup, mqd, sizeof(struct v9_mqd_allocation)); in gfx_v9_0_kiq_init_queue()
3927 gfx_v9_0_kiq_init_queue(&adev->gfx.kiq[0].ring); in gfx_v9_0_kiq_resume()
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H A Dgfx_v9_4_3.c343 adev->gfx.kiq[i].pmf = &gfx_v9_4_3_kiq_pm4_funcs; in gfx_v9_4_3_set_kiq_pm4_funcs()
1132 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[i].ring); in gfx_v9_4_3_sw_fini()
1681 adev->gfx.kiq[xcc_id].ring.sched.ready = false; in gfx_v9_4_3_xcc_cp_compute_enable()
1973 ((adev->doorbell_index.kiq + in gfx_v9_4_3_xcc_kiq_init_register()
2062 tmp_mqd = (struct v9_mqd *)adev->gfx.kiq[xcc_id].mqd_backup; in gfx_v9_4_3_xcc_kiq_init_queue()
2065 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v9_4_3_xcc_kiq_init_queue()
2066 memcpy(mqd, adev->gfx.kiq[xcc_id].mqd_backup, sizeof(struct v9_mqd_allocation)); in gfx_v9_4_3_xcc_kiq_init_queue()
2089 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v9_4_3_xcc_kiq_init_queue()
2090 memcpy(adev->gfx.kiq[xcc_id].mqd_backup, mqd, sizeof(struct v9_mqd_allocation)); in gfx_v9_4_3_xcc_kiq_init_queue()
2156 gfx_v9_4_3_xcc_kiq_init_queue(&adev->gfx.kiq[xcc_id].ring, xcc_id); in gfx_v9_4_3_xcc_kiq_resume()
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H A Dgfx_v10_0.c3889 adev->gfx.kiq[0].pmf = &gfx_v10_0_kiq_pm4_funcs; in gfx_v10_0_set_kiq_pm4_funcs()
4872 &adev->gfx.kiq[0].irq); in gfx_v10_0_sw_init()
5034 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v10_0_sw_fini()
6651 adev->gfx.kiq[0].ring.sched.ready = false; in gfx_v10_0_cp_compute_enable()
7117 (adev->doorbell_index.kiq * 2) << 2); in gfx_v10_0_kiq_init_register()
7156 if (adev->gfx.kiq[0].mqd_backup) in gfx_v10_0_kiq_init_queue()
7157 memcpy_toio(mqd, adev->gfx.kiq[0].mqd_backup, sizeof(*mqd)); in gfx_v10_0_kiq_init_queue()
7179 if (adev->gfx.kiq[0].mqd_backup) in gfx_v10_0_kiq_init_queue()
7180 memcpy_fromio(adev->gfx.kiq[0].mqd_backup, mqd, sizeof(*mqd)); in gfx_v10_0_kiq_init_queue()
7217 gfx_v10_0_kiq_init_queue(&adev->gfx.kiq[0].ring); in gfx_v10_0_kiq_resume()
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H A Damdgpu_amdkfd_gfx_v10_3.c280 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v10_3()
295 spin_lock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v10_3()
322 spin_unlock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v10_3()
H A Dvega10_reg_init.c60 adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; in vega10_doorbell_index_init()
H A Dvega20_reg_init.c60 adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; in vega20_doorbell_index_init()
H A Damdgpu_amdkfd_gfx_v10.c294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in kgd_hiq_mqd_load()
309 spin_lock(&adev->gfx.kiq[0].ring_lock); in kgd_hiq_mqd_load()
336 spin_unlock(&adev->gfx.kiq[0].ring_lock); in kgd_hiq_mqd_load()
H A Dgfx_v12_1.c278 if (adev->enable_mes && !adev->gfx.kiq[0].ring.sched.ready) { in gfx_v12_1_kiq_unmap_queues()
351 adev->gfx.kiq[i].pmf = &gfx_v12_1_kiq_pm4_funcs; in gfx_v12_1_set_kiq_pm4_funcs()
1588 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[i].ring); in gfx_v12_1_sw_fini()
2243 adev->gfx.kiq[xcc_id].ring.sched.ready = enable; in gfx_v12_1_xcc_cp_compute_enable()
2431 ((adev->doorbell_index.kiq + in gfx_v12_1_xcc_cp_set_doorbell_range()
2690 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v12_1_xcc_kiq_init_queue()
2691 memcpy(mqd, adev->gfx.kiq[xcc_id].mqd_backup, sizeof(*mqd)); in gfx_v12_1_xcc_kiq_init_queue()
2713 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v12_1_xcc_kiq_init_queue()
2714 memcpy(adev->gfx.kiq[xcc_id].mqd_backup, mqd, sizeof(*mqd)); in gfx_v12_1_xcc_kiq_init_queue()
2756 ring = &adev->gfx.kiq[xcc_id].ring; in gfx_v12_1_xcc_kiq_resume()
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H A Damdgpu_amdkfd_gfx_v9.c305 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[inst].ring; in kgd_gfx_v9_hiq_mqd_load()
320 spin_lock(&adev->gfx.kiq[inst].ring_lock); in kgd_gfx_v9_hiq_mqd_load()
347 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in kgd_gfx_v9_hiq_mqd_load()
H A Dgfx_v8_0.c2058 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v8_0_sw_fini()
4299 adev->gfx.kiq[0].ring.sched.ready = false; in gfx_v8_0_cp_compute_enable()
4319 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_kiq_kcq_enable()
4609 if (adev->gfx.kiq[0].mqd_backup) in gfx_v8_0_kiq_init_queue()
4610 memcpy(mqd, adev->gfx.kiq[0].mqd_backup, sizeof(struct vi_mqd_allocation)); in gfx_v8_0_kiq_init_queue()
4633 if (adev->gfx.kiq[0].mqd_backup) in gfx_v8_0_kiq_init_queue()
4634 memcpy(adev->gfx.kiq[0].mqd_backup, mqd, sizeof(struct vi_mqd_allocation)); in gfx_v8_0_kiq_init_queue()
4673 WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2); in gfx_v8_0_set_mec_doorbell_range()
4682 gfx_v8_0_kiq_init_queue(&adev->gfx.kiq[0].ring); in gfx_v8_0_kiq_resume()
4714 ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_cp_test_all_rings()
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H A Dgfx_v12_0.c358 if (adev->enable_mes && !adev->gfx.kiq[0].ring.sched.ready) { in gfx_v12_0_kiq_unmap_queues()
427 adev->gfx.kiq[0].pmf = &gfx_v12_0_kiq_pm4_funcs; in gfx_v12_0_set_kiq_pm4_funcs()
1662 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v12_0_sw_fini()
2838 adev->gfx.kiq[0].ring.sched.ready = enable; in gfx_v12_0_cp_compute_enable()
2997 (adev->doorbell_index.kiq * 2) << 2); in gfx_v12_0_cp_set_doorbell_range()
3400 (adev->doorbell_index.kiq * 2) << 2); in gfx_v12_0_kiq_init_register()
3501 gfx_v12_0_kiq_init_queue(&adev->gfx.kiq[0].ring); in gfx_v12_0_kiq_resume()
3502 adev->gfx.kiq[0].ring.sched.ready = true; in gfx_v12_0_kiq_resume()
3557 adev->gfx.kiq[0].ring.sched.ready = false; in gfx_v12_0_cp_resume()
5475 adev->gfx.kiq[0].ring.funcs = &gfx_v12_0_ring_funcs_kiq; in gfx_v12_0_set_ring_funcs()
H A Dsoc24.c269 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc24_init_doorbell_index()
H A Dgfx_v11_0.c440 if (adev->enable_mes && !adev->gfx.kiq[0].ring.sched.ready) { in gfx11_kiq_unmap_queues()
509 adev->gfx.kiq[0].pmf = &gfx_v11_0_kiq_pm4_funcs; in gfx_v11_0_set_kiq_pm4_funcs()
1985 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v11_0_sw_fini()
4139 (adev->doorbell_index.kiq * 2) << 2); in gfx_v11_0_cp_set_doorbell_range()
4560 (adev->doorbell_index.kiq * 2) << 2); in gfx_v11_0_kiq_init_register()
4599 if (adev->gfx.kiq[0].mqd_backup) in gfx_v11_0_kiq_init_queue()
4600 memcpy_toio(mqd, adev->gfx.kiq[0].mqd_backup, sizeof(*mqd)); in gfx_v11_0_kiq_init_queue()
4622 if (adev->gfx.kiq[0].mqd_backup) in gfx_v11_0_kiq_init_queue()
4623 memcpy_fromio(adev->gfx.kiq[0].mqd_backup, mqd, sizeof(*mqd)); in gfx_v11_0_kiq_init_queue()
4660 gfx_v11_0_kiq_init_queue(&adev->gfx.kiq[0].ring); in gfx_v11_0_kiq_resume()
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H A Dgmc_v12_1.c378 if (((adev->gfx.kiq[inst].ring.sched.ready || in gmc_v12_1_flush_gpu_tlb()
H A Dgmc_v11_0.c246 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v11_0_flush_gpu_tlb()
H A Dsoc21.c486 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc21_init_doorbell_index()