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Searched refs:ixSINK_DESCRIPTION5 (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h337 #define ixSINK_DESCRIPTION5 0x000A macro
H A Ddce_8_0_d.h5401 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_10_0_d.h6635 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_11_0_d.h6797 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_11_2_d.h8142 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_12_0_offset.h18067 #define ixSINK_DESCRIPTION5 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7394 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_0_1_offset.h12193 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_1_0_offset.h13037 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_2_1_0_offset.h12797 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_2_0_offset.h13564 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_1_5_offset.h14117 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_5_1_offset.h95 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_5_0_offset.h116 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_1_4_offset.h163 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_1_2_offset.h14011 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_2_1_offset.h13518 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_1_6_offset.h14608 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_0_2_offset.h15196 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_4_1_0_offset.h15574 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_2_0_0_offset.h16461 #define ixSINK_DESCRIPTION5 … macro
H A Ddcn_3_0_0_offset.h16946 #define ixSINK_DESCRIPTION5 … macro