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Searched refs:ixSINK_DESCRIPTION0 (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h324 #define ixSINK_DESCRIPTION0 0x0005 macro
H A Ddce_8_0_d.h5396 #define ixSINK_DESCRIPTION0 0x5 macro
H A Ddce_10_0_d.h6630 #define ixSINK_DESCRIPTION0 0x5 macro
H A Ddce_11_0_d.h6792 #define ixSINK_DESCRIPTION0 0x5 macro
H A Ddce_11_2_d.h8137 #define ixSINK_DESCRIPTION0 0x5 macro
H A Ddce_12_0_offset.h18062 #define ixSINK_DESCRIPTION0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7389 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_0_1_offset.h12188 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_1_0_offset.h13032 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_2_1_0_offset.h12792 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_2_0_offset.h13559 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_1_5_offset.h14112 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_5_1_offset.h90 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_5_0_offset.h111 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_1_4_offset.h158 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_1_2_offset.h14006 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_2_1_offset.h13513 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_1_6_offset.h14603 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_0_2_offset.h15191 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_4_1_0_offset.h15569 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_2_0_0_offset.h16456 #define ixSINK_DESCRIPTION0 macro
H A Ddcn_3_0_0_offset.h16941 #define ixSINK_DESCRIPTION0 macro