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Searched refs:ixMPLL_BYPASSCLK_SEL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dpolaris_baco.c64 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
102 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
150 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
H A Dfiji_baco.c74 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
90 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
H A Dci_baco.c76 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
108 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
H A Dtonga_baco.c74 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
99 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_d.h55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
H A Dsmu_7_1_1_d.h55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
H A Dsmu_7_1_2_d.h56 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
H A Dsmu_7_1_3_d.h59 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
H A Dsmu_7_0_1_d.h56 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
H A Dsmu_7_1_0_d.h55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro