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Searched refs:ixLCAC_MC1_CNTL (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_d.h635 #define ixLCAC_MC1_CNTL 0xd020813c macro
H A Dsmu_7_0_0_d.h728 #define ixLCAC_MC1_CNTL 0xc0400d3c macro
H A Dsmu_7_1_1_d.h1028 #define ixLCAC_MC1_CNTL 0xc040013c macro
H A Dsmu_7_1_2_d.h1179 #define ixLCAC_MC1_CNTL 0xc040013c macro
H A Dsmu_7_1_3_d.h1111 #define ixLCAC_MC1_CNTL 0xc040013c macro
H A Dsmu_7_0_1_d.h1218 #define ixLCAC_MC1_CNTL 0xc0400d3c macro
H A Dsmu_7_1_0_d.h1247 #define ixLCAC_MC1_CNTL 0xc0400d3c macro
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c1244 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC1_CNTL, 0x5); in smu7_enable_sclk_mclk_dpm()
1249 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC1_CNTL, 0x400009); in smu7_enable_sclk_mclk_dpm()
1252 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC1_CNTL, 0x400005); in smu7_enable_sclk_mclk_dpm()