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Searched refs:ixGRA06 (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h307 #define ixGRA06 0x0006 macro
H A Ddce_8_0_d.h5106 #define ixGRA06 0x6 macro
H A Ddce_10_0_d.h5989 #define ixGRA06 0x6 macro
H A Ddce_11_0_d.h6066 #define ixGRA06 0x6 macro
H A Ddce_11_2_d.h7740 #define ixGRA06 0x6 macro
H A Ddce_12_0_offset.h18179 #define ixGRA06 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7272 #define ixGRA06 … macro
H A Ddcn_3_0_1_offset.h12071 #define ixGRA06 … macro
H A Ddcn_1_0_offset.h12810 #define ixGRA06 … macro
H A Ddcn_2_1_0_offset.h12675 #define ixGRA06 … macro
H A Ddcn_3_2_0_offset.h13442 #define ixGRA06 … macro
H A Ddcn_3_1_5_offset.h13995 #define ixGRA06 … macro
H A Ddcn_3_1_4_offset.h121 #define ixGRA06 … macro
H A Ddcn_3_1_2_offset.h13889 #define ixGRA06 … macro
H A Ddcn_3_2_1_offset.h13396 #define ixGRA06 … macro
H A Ddcn_3_1_6_offset.h14486 #define ixGRA06 … macro
H A Ddcn_3_0_2_offset.h15074 #define ixGRA06 … macro
H A Ddcn_2_0_0_offset.h16339 #define ixGRA06 … macro
H A Ddcn_3_0_0_offset.h16824 #define ixGRA06 … macro